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Simple PCIe FMC carrier SPEC
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Simple PCIe FMC carrier SPEC
Commits
7095df9c
Commit
7095df9c
authored
Jul 16, 2019
by
Dimitris Lampridis
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fix stalling in 'crossbar' process
parent
3a705a48
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spec_template_wr.vhd
hdl/rtl/spec_template_wr.vhd
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hdl/rtl/spec_template_wr.vhd
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7095df9c
...
@@ -489,32 +489,30 @@ begin -- architecture top
...
@@ -489,32 +489,30 @@ begin -- architecture top
carrier_app_xb
:
process
(
clk_sys_62m5
)
carrier_app_xb
:
process
(
clk_sys_62m5
)
is
is
type
t_ca_state
is
(
S_IDLE
,
S_APP
,
S_CARRIER
);
type
t_ca_state
is
(
S_IDLE
,
S_APP
,
S_CARRIER
);
variable
ca_state
:
t_ca_state
;
variable
ca_state
:
t_ca_state
;
constant
wb_idle_master_out
:
t_wishbone_master_out
:
=
variable
can_stall
:
std_logic
;
(
cyc
=>
'0'
,
stb
=>
'0'
,
adr
=>
(
others
=>
'X'
),
sel
=>
x"0"
,
constant
c_IDLE_WB_MASTER_IN
:
t_wishbone_master_in
:
=
we
=>
'0'
,
dat
=>
(
others
=>
'X'
));
(
'0'
,
'0'
,
'0'
,
'0'
,
c_DUMMY_WB_DATA
);
constant
wb_idle_master_in
:
t_wishbone_master_in
:
=
(
stall
=>
'0'
,
ack
=>
'0'
,
err
=>
'0'
,
dat
=>
(
others
=>
'X'
),
rty
=>
'0'
);
begin
begin
if
rising_edge
(
clk_sys_62m5
)
then
if
rising_edge
(
clk_sys_62m5
)
then
if
rst_sys_62m5_n
=
'0'
then
if
rst_sys_62m5_n
=
'0'
then
ca_state
:
=
S_IDLE
;
ca_state
:
=
S_IDLE
;
gn_wb_in
<=
wb_idle_master_in
;
gn_wb_in
<=
c_IDLE_WB_MASTER_IN
;
app_wb_o
<=
wb_idle_master_out
;
app_wb_o
<=
c_DUMMY_WB_MASTER_OUT
;
carrier_wb_in
<=
wb_idle_master_out
;
carrier_wb_in
<=
c_DUMMY_WB_MASTER_OUT
;
else
else
-- Default: idle.
gn_wb_in
<=
wb_idle_master_in
;
app_wb_o
<=
wb_idle_master_out
;
carrier_wb_in
<=
wb_idle_master_out
;
case
ca_state
is
case
ca_state
is
when
S_IDLE
=>
when
S_IDLE
=>
gn_wb_in
<=
c_IDLE_WB_MASTER_IN
;
app_wb_o
<=
c_DUMMY_WB_MASTER_OUT
;
carrier_wb_in
<=
c_DUMMY_WB_MASTER_OUT
;
if
gn_wb_out
.
cyc
=
'1'
if
gn_wb_out
.
cyc
=
'1'
and
gn_wb_out
.
stb
=
'1'
and
gn_wb_out
.
stb
=
'1'
then
then
-- New transaction.
-- New transaction.
-- Stall
-- Stall
gn_wb_in
.
stall
<=
'1'
;
gn_wb_in
.
stall
<=
'1'
;
can_stall
:
=
'1'
;
if
gn_wb_out
.
adr
(
31
downto
13
)
=
(
31
downto
13
=>
'0'
)
then
if
gn_wb_out
.
adr
(
31
downto
13
)
=
(
31
downto
13
=>
'0'
)
then
ca_state
:
=
S_CARRIER
;
ca_state
:
=
S_CARRIER
;
-- Pass to carrier
-- Pass to carrier
...
@@ -526,16 +524,18 @@ begin -- architecture top
...
@@ -526,16 +524,18 @@ begin -- architecture top
end
if
;
end
if
;
when
S_CARRIER
=>
when
S_CARRIER
=>
-- Pass from carrier.
-- Pass from carrier.
carrier_wb_in
.
stb
<=
'0'
;
carrier_wb_in
.
stb
<=
carrier_wb_out
.
stall
and
can_stall
;
gn_wb_in
<=
carrier_wb_out
;
can_stall
:
=
can_stall
and
carrier_wb_out
.
stall
;
gn_wb_in
.
stall
<=
'1'
;
gn_wb_in
<=
carrier_wb_out
;
gn_wb_in
.
stall
<=
'1'
;
if
carrier_wb_out
.
ack
=
'1'
then
if
carrier_wb_out
.
ack
=
'1'
then
ca_state
:
=
S_IDLE
;
ca_state
:
=
S_IDLE
;
end
if
;
end
if
;
when
S_APP
=>
when
S_APP
=>
-- Pass from application
-- Pass from application
app_wb_o
.
stb
<=
'0'
;
app_wb_o
.
stb
<=
app_wb_i
.
stall
and
can_stall
;
gn_wb_in
<=
app_wb_i
;
can_stall
:
=
can_stall
and
app_wb_i
.
stall
;
gn_wb_in
<=
app_wb_i
;
gn_wb_in
.
stall
<=
'1'
;
gn_wb_in
.
stall
<=
'1'
;
if
app_wb_i
.
ack
=
'1'
or
app_wb_i
.
err
=
'1'
then
if
app_wb_i
.
ack
=
'1'
or
app_wb_i
.
err
=
'1'
then
ca_state
:
=
S_IDLE
;
ca_state
:
=
S_IDLE
;
...
@@ -543,7 +543,7 @@ begin -- architecture top
...
@@ -543,7 +543,7 @@ begin -- architecture top
end
case
;
end
case
;
end
if
;
end
if
;
end
if
;
end
if
;
end
process
;
end
process
carrier_app_xb
;
i_devs
:
entity
work
.
spec_template_regs
i_devs
:
entity
work
.
spec_template_regs
port
map
(
port
map
(
...
...
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