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Simple PCIe FMC carrier SPEC
Commit 47a08786 authored by Federico Vaga's avatar Federico Vaga
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sw:drv: fix after cheby mmap renaming 

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 0efc571f
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Showing with 21 additions and 21 deletions
software/kernel/Makefile
View file @ 47a08786
...@@ -23,7 +23,7 @@ all: modules ...@@ -23,7 +23,7 @@ all: modules
.PHONY: all modules clean help install modules_install spec-core-fpga.h .PHONY: all modules clean help install modules_install spec-core-fpga.h
spec-core-fpga.h: spec-core-fpga.h:
$(CHEBY) --gen-c -i $(HDL_DIR)/rtl/spec_template_regs.cheby > $@ $(CHEBY) --gen-c -i $(HDL_DIR)/rtl/spec_base_regs.cheby > $@
modules help install modules_install: spec-core-fpga.h modules help install modules_install: spec-core-fpga.h
$(MAKE) -C $(LINUX) M=$(shell pwd) VERSION=$(VERSION) CONFIG_FPGA_MGR_BACKPORT_PATH_ABS=$(CONFIG_FPGA_MGR_BACKPORT_PATH_ABS) CONFIG_FPGA_MGR_BACKPORT=$(CONFIG_FPGA_MGR_BACKPORT) FMC_ABS=$(FMC_ABS) I2C_ABS=$(I2C_ABS) $@ $(MAKE) -C $(LINUX) M=$(shell pwd) VERSION=$(VERSION) CONFIG_FPGA_MGR_BACKPORT_PATH_ABS=$(CONFIG_FPGA_MGR_BACKPORT_PATH_ABS) CONFIG_FPGA_MGR_BACKPORT=$(CONFIG_FPGA_MGR_BACKPORT) FMC_ABS=$(FMC_ABS) I2C_ABS=$(I2C_ABS) $@
......
software/kernel/spec-core-fpga.c
View file @ 47a08786
...@@ -27,12 +27,12 @@ enum spec_fpga_irq_lines { ...@@ -27,12 +27,12 @@ enum spec_fpga_irq_lines {
}; };
enum spec_fpga_csr_offsets { enum spec_fpga_csr_offsets {
SPEC_FPGA_CSR_APP_OFF = SPEC_TEMPLATE_REGS_CSR + 0x00, SPEC_FPGA_CSR_APP_OFF = SPEC_BASE_REGS_CSR + 0x00,
SPEC_FPGA_CSR_RESETS = SPEC_TEMPLATE_REGS_CSR + 0x04, SPEC_FPGA_CSR_RESETS = SPEC_BASE_REGS_CSR + 0x04,
SPEC_FPGA_CSR_FMC_PRESENT = SPEC_TEMPLATE_REGS_CSR + 0x08, SPEC_FPGA_CSR_FMC_PRESENT = SPEC_BASE_REGS_CSR + 0x08,
SPEC_FPGA_CSR_GN4124_STATUS = SPEC_TEMPLATE_REGS_CSR + 0x0C, SPEC_FPGA_CSR_GN4124_STATUS = SPEC_BASE_REGS_CSR + 0x0C,
SPEC_FPGA_CSR_DDR_STATUS = SPEC_TEMPLATE_REGS_CSR + 0x10, SPEC_FPGA_CSR_DDR_STATUS = SPEC_BASE_REGS_CSR + 0x10,
SPEC_FPGA_CSR_PCB_REV = SPEC_TEMPLATE_REGS_CSR + 0x14, SPEC_FPGA_CSR_PCB_REV = SPEC_BASE_REGS_CSR + 0x14,
}; };
enum spec_fpga_csr_fields { enum spec_fpga_csr_fields {
...@@ -40,9 +40,9 @@ enum spec_fpga_csr_fields { ...@@ -40,9 +40,9 @@ enum spec_fpga_csr_fields {
}; };
enum spec_fpga_therm_offsets { enum spec_fpga_therm_offsets {
SPEC_FPGA_THERM_SERID_MSB = SPEC_TEMPLATE_REGS_THERM_ID + 0x0, SPEC_FPGA_THERM_SERID_MSB = SPEC_BASE_REGS_THERM_ID + 0x0,
SPEC_FPGA_THERM_SERID_LSB = SPEC_TEMPLATE_REGS_THERM_ID + 0x4, SPEC_FPGA_THERM_SERID_LSB = SPEC_BASE_REGS_THERM_ID + 0x4,
SPEC_FPGA_THERM_TEMP = SPEC_TEMPLATE_REGS_THERM_ID + 0x8, SPEC_FPGA_THERM_TEMP = SPEC_BASE_REGS_THERM_ID + 0x8,
}; };
enum spec_fpga_meta_cap_mask { enum spec_fpga_meta_cap_mask {
...@@ -92,8 +92,8 @@ static int spec_fpga_dbg_bld_info(struct seq_file *s, void *offset) ...@@ -92,8 +92,8 @@ static int spec_fpga_dbg_bld_info(struct seq_file *s, void *offset)
return 0; return 0;
} }
for (off = SPEC_TEMPLATE_REGS_BUILDINFO; for (off = SPEC_BASE_REGS_BUILDINFO;
off < SPEC_TEMPLATE_REGS_BUILDINFO + SPEC_TEMPLATE_REGS_BUILDINFO_SIZE -1; off < SPEC_BASE_REGS_BUILDINFO + SPEC_BASE_REGS_BUILDINFO_SIZE -1;
off++) { off++) {
char tmp = ioread8(spec_fpga->fpga + off); char tmp = ioread8(spec_fpga->fpga + off);
...@@ -189,8 +189,8 @@ static struct resource spec_fpga_vic_res[] = { ...@@ -189,8 +189,8 @@ static struct resource spec_fpga_vic_res[] = {
{ {
.name = "htvic-mem", .name = "htvic-mem",
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
.start = SPEC_TEMPLATE_REGS_VIC, .start = SPEC_BASE_REGS_VIC,
.end = SPEC_TEMPLATE_REGS_VIC + SPEC_TEMPLATE_REGS_VIC_SIZE -1, .end = SPEC_BASE_REGS_VIC + SPEC_BASE_REGS_VIC_SIZE -1,
}, { }, {
.name = "htvic-irq", .name = "htvic-irq",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
...@@ -242,8 +242,8 @@ static struct resource spec_fpga_dma_res[] = { ...@@ -242,8 +242,8 @@ static struct resource spec_fpga_dma_res[] = {
{ {
.name = "spec-gn412x-dma-mem", .name = "spec-gn412x-dma-mem",
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
.start = SPEC_TEMPLATE_REGS_DMA, .start = SPEC_BASE_REGS_DMA,
.end = SPEC_TEMPLATE_REGS_DMA + SPEC_TEMPLATE_REGS_DMA_SIZE - 1, .end = SPEC_BASE_REGS_DMA + SPEC_BASE_REGS_DMA_SIZE - 1,
}, { }, {
.name = "spec-gn412x-dma-irq-done", .name = "spec-gn412x-dma-irq-done",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
...@@ -313,8 +313,8 @@ static struct resource spec_fpga_fmc_i2c_res[] = { ...@@ -313,8 +313,8 @@ static struct resource spec_fpga_fmc_i2c_res[] = {
{ {
.name = "i2c-ocores-mem", .name = "i2c-ocores-mem",
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
.start = SPEC_TEMPLATE_REGS_FMC_I2C, .start = SPEC_BASE_REGS_FMC_I2C,
.end = SPEC_TEMPLATE_REGS_FMC_I2C + SPEC_TEMPLATE_REGS_FMC_I2C_SIZE -1, .end = SPEC_BASE_REGS_FMC_I2C + SPEC_BASE_REGS_FMC_I2C_SIZE -1,
}, { }, {
.name = "i2c-ocores-irq", .name = "i2c-ocores-irq",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
...@@ -338,8 +338,8 @@ static struct resource spec_fpga_spi_res[] = { ...@@ -338,8 +338,8 @@ static struct resource spec_fpga_spi_res[] = {
{ {
.name = "spi-ocores-mem", .name = "spi-ocores-mem",
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
.start = SPEC_TEMPLATE_REGS_FLASH_SPI, .start = SPEC_BASE_REGS_FLASH_SPI,
.end = SPEC_TEMPLATE_REGS_FLASH_SPI + SPEC_TEMPLATE_REGS_FLASH_SPI_SIZE - 1, .end = SPEC_BASE_REGS_FLASH_SPI + SPEC_BASE_REGS_FLASH_SPI_SIZE - 1,
}, { }, {
.name = "spi-ocores-irq", .name = "spi-ocores-irq",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
......
software/kernel/spec.h
View file @ 47a08786
...@@ -67,7 +67,7 @@ enum { ...@@ -67,7 +67,7 @@ enum {
enum { enum {
/* Metadata */ /* Metadata */
SPEC_META_BASE = SPEC_TEMPLATE_REGS_METADATA, SPEC_META_BASE = SPEC_BASE_REGS_METADATA,
SPEC_META_VENDOR = SPEC_META_BASE + FPGA_META_VENDOR, SPEC_META_VENDOR = SPEC_META_BASE + FPGA_META_VENDOR,
SPEC_META_DEVICE = SPEC_META_BASE + FPGA_META_DEVICE, SPEC_META_DEVICE = SPEC_META_BASE + FPGA_META_DEVICE,
SPEC_META_VERSION = SPEC_META_BASE + FPGA_META_VERSION, SPEC_META_VERSION = SPEC_META_BASE + FPGA_META_VERSION,
......
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