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Simple PCIe FMC carrier SPEC
Commit 1e9e50ec authored by Federico Vaga's avatar Federico Vaga
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apply internal guidelines for CHANGELOG 

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
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CHANGELOG.rst
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SPDX-License-Identifier: CC-0.0
SPDX-FileCopyrightText: 2019 CERN
=========
Changelog
=========
[2.0.0] 2020-07-30
2.0.0 - 2020-07-30
==================
Added
-----
- [hdl] new testbench to test the DMA feature (read/write to DDR memory) in the new golden.
- [sw] basic Python module to handle DMA and FPGA programming
- [sw] user-space DMA interface in debugfs (read/write)
- [tst] add integration tests for DMA transfers
- hdl: new testbench to test the DMA feature (read/write to DDR memory) in the new golden.
- sw: basic Python module to handle DMA and FPGA programming
- sw: user-space DMA interface in debugfs (read/write)
- tst: add integration tests for DMA transfers
Changed
-------
- [hdl] Switch to 125MHz (from 62.5MHz before) clock for DMA transfers.
- [hdl] Cleanup of top-levels, addition of DMA to the golden.
- hdl: Switch to 125MHz (from 62.5MHz before) clock for DMA transfers.
- hdl: Cleanup of top-levels, addition of DMA to the golden.
Fixed
-----
- [hdl] DMA misalignment issue due to loss of 32-bit words, caused in turn by inadequate flow control.
- [hdl] typo in synthesis constraints.
- hdl: DMA misalignment issue due to loss of 32-bit words, caused in turn by inadequate flow control.
- hdl: typo in synthesis constraints.
[1.4.15] 2020-06-03
1.4.15 - 2020-06-03
===================
Added
----
- [hdl] ignore autogenerated files to build metadata (otherwise the repository
-----
- hdl: ignore autogenerated files to build metadata (otherwise the repository
is always marked as dirty)
[1.4.14] 2020-05-28
1.4.14 - 2020-05-28
===================
Added
-----
- [hdl] export DDMTD clock output
- hdl: export DDMTD clock output
[1.4.13] 2020-05-12
1.4.13 - 2020-05-12
===================
Fixed
-----
- [hdl] report correct version in spec-base metadata
- hdl: report correct version in spec-base metadata
[1.4.12] 2020-05-12
1.4.12 - 2020-05-12
===================
Added
-----
- [hdl] metadata source-id automatic assignment
- hdl: metadata source-id automatic assignment
Changed
-----
- [sw] do not double remap memory
-------
- sw: do not double remap memory
[1.4.11] 2020-05-04
1.4.11 - 2020-05-04
===================
Added
-----
- [sw] added DMA engine channel for application to the list of resources
- sw: added DMA engine channel for application to the list of resources
Changed
-----
- [sw] little code improvements
-------
- sw: little code improvements
[1.4.10] 2020-04-24
1.4.10 - 2020-04-24
===================
Changed
-------
- [bld] assign dependencies path based on REPO_PARENT
- [bld] check for missing dependencies
- bld: assign dependencies path based on REPO_PARENT
- bld: check for missing dependencies
Fixed
-----
- [sw] fix kernel crash when programming new bitstream
- sw: fix kernel crash when programming new bitstream
[1.4.9] 2020-03-10
1.4.9 - 2020-03-10
==================
Added
-----
- [sw] support for kernel version more recent than 3.10 (RedHat)
- sw: support for kernel version more recent than 3.10 (RedHat)
Fixed
-----
- [sw] reduce allocation on stack
- sw: reduce allocation on stack
[1.4.8] 2020-02-12
1.4.8 - 2020-02-12
==================
Fixed
-----
- [sw] fix kernel crash when programming new bitstream
- sw: fix kernel crash when programming new bitstream
[1.4.7] 2020-01-15
1.4.7 - 2020-01-15
==================
Fixed
-------
- [doc] sysfs paths were wrong
- [doc] incomplete driver loading list of commands
- doc: sysfs paths were wrong
- doc: incomplete driver loading list of commands
[1.4.6] 2020-01-13
1.4.6 - 2020-01-13
==================
Changed
-------
- [doc] improve documentation
- [sw] better error reporting on I2C errors
- doc: improve documentation
- sw: better error reporting on I2C errors
[1.4.5] 2019-12-17
1.4.5 - 2019-12-17
==================
Something happened while synchronizing different branches and version 1.4.4
could be inconsistent on different repositories. This release increment realign
all repositories
[1.4.4] 2019-12-17
1.4.4 - 2019-12-17
==================
Changed
-----
- [sw] better integration in coht, rename environment variable to FPGA_MGR
-------
- sw: better integration in coht, rename environment variable to FPGA_MGR
Fixed
-----
- [sw] suggested fixed reported by checkpatch and coccicheck
- [hdl] restore lost references to git submodules
- sw: suggested fixed reported by checkpatch and coccicheck
- hdl: restore lost references to git submodules
[1.4.3] - 2019-10-17
====================
1.4.3 - 2019-10-17
==================
Fixed
-----
- [sw] fix SPEC GPIO get_direction
- sw: fix SPEC GPIO get_direction
[1.4.2] - 2019-10-15
====================
1.4.2 - 2019-10-15
==================
Fixed
-----
- [sw] fix SPEC driver dependency with I2C OCores
- sw: fix SPEC driver dependency with I2C OCores
[1.4.1] - 2019-09-23
====================
1.4.1 - 2019-09-23
==================
Changed
-------
- [sw] do not used devm_* operations (it seems to solve problems)
- sw: do not used devm_* operations (it seems to solve problems)
Removed
-------
- [sw] Removed IRQ line assignment to FCL (not used)
- sw: Removed IRQ line assignment to FCL (not used)
Fixed
-----
- [sw] kcalloc usage
- [sw] memcpy(), memset() usage
- [sw] checkpatch style fixes
- sw: kcalloc usage
- sw: memcpy(), memset() usage
- sw: checkpatch style fixes
[1.4.0] 2019-09-11
==================
1.4.0 2019-09-11
================
Added
-----
- [hdl] spec-base IP-core to support SPEC based designs
- [sw] Driver for GN4124 FCL using Linux FPGA manager
- [sw] Driver for GN4124 GPIO using Linux GPIOlib
- [sw] Driver for gn412x-core DMA using Linux DMA engine
- [sw] Support for spec-base IP-core
- [sw] Support for FMC
- hdl: spec-base IP-core to support SPEC based designs
- sw: Driver for GN4124 FCL using Linux FPGA manager
- sw: Driver for GN4124 GPIO using Linux GPIOlib
- sw: Driver for gn412x-core DMA using Linux DMA engine
- sw: Support for spec-base IP-core
- sw: Support for FMC
[0.0.0]
=======
0.0.0
=====
Start the development of a new SPEC driver and SPEC HDL support layer
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