... | ... | @@ -31,8 +31,8 @@ transceiver with clock, 2 clock pairs, JTAG |
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\* 1 Xilinx Spartan6 FPGA (XC6SLX45T)
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\* Simple clocking resources
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o 1 10-280 MHz I2C Programmable XO Oscillator (Silicon Labs Si570)
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o 1 25 MHz TCXOs controlled by a DACs with SPI interface (AD5662)
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o 1 20 MHz VCXOs controlled by a DACs with SPI interface (AD5662)
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o 1 25 MHz TCXO controlled by a DAC with SPI interface (AD5662)
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o 1 20 MHz VCXO controlled by a DAC with SPI interface (AD5662)
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o 1 low-jitter frequency synthesizer (TI CDCM61004, fixed configuration,
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Fout=125MHz)
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\* On board memory
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... | ... | @@ -270,7 +270,7 @@ Demo of production test software shown. Needs only minor modifications.</td> |
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-----
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Erik van der Bij, Matthieu Cattin, Tomasz Wlostowski - 20 July 2011
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Erik van der Bij, Matthieu Cattin, Tomasz Wlostowski - 21 July 2011
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