Skip to content
GitLab
Explore
Sign in
Projects
Simple PCIe FMC carrier SPEC
Repository
spec
hdl
top
full
Manifest.py
Find file
Blame
History
Permalink
remove DDR from golden_wr, introduce 'full' design
· 3a705a48
Dimitris Lampridis
authored
Jul 16, 2019
3a705a48