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Simple PCIe FMC carrier SPEC - Software
Commit 84893f26 authored by Alessandro Rubini's avatar Alessandro Rubini
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kernel/wr-nic-dio.c: cleanup: use a register map

parent c09d2431
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Showing with 71 additions and 14 deletions
kernel/wr-nic-dio.c
View file @ 84893f26
......@@ -24,19 +24,82 @@
#define wrn_stat 0
#endif
/* We need a clear mapping for the registers of the various bits */
struct regmap {
int trig_l;
int trig_h;
int cycle;
int pulse;
int fifo_tai_l;
int fifo_tai_h;
int fifo_cycle;
int fifo_status;
};
#define R(x) (offsetof(struct DIO_WB, x))
static struct regmap regmap[] = {
{
.trig_l = R(TRIG0),
.trig_h = R(TRIGH0),
.cycle = R(CYC0),
.pulse = R(PROG0_PULSE),
.fifo_tai_l = R(TSF0_R0),
.fifo_tai_h = R(TSF0_R1),
.fifo_cycle = R(TSF0_R2),
.fifo_status = R(TSF0_CSR),
}, {
.trig_l = R(TRIG1),
.trig_h = R(TRIGH1),
.cycle = R(CYC1),
.pulse = R(PROG1_PULSE),
.fifo_tai_l = R(TSF1_R0),
.fifo_tai_h = R(TSF1_R1),
.fifo_cycle = R(TSF1_R2),
.fifo_status = R(TSF1_CSR),
}, {
.trig_l = R(TRIG2),
.trig_h = R(TRIGH2),
.cycle = R(CYC2),
.pulse = R(PROG2_PULSE),
.fifo_tai_l = R(TSF2_R0),
.fifo_tai_h = R(TSF2_R1),
.fifo_cycle = R(TSF2_R2),
.fifo_status = R(TSF2_CSR),
}, {
.trig_l = R(TRIG3),
.trig_h = R(TRIGH3),
.cycle = R(CYC3),
.pulse = R(PROG3_PULSE),
.fifo_tai_l = R(TSF3_R0),
.fifo_tai_h = R(TSF3_R1),
.fifo_cycle = R(TSF3_R2),
.fifo_status = R(TSF3_CSR),
}, {
.trig_l = R(TRIG4),
.trig_h = R(TRIGH4),
.cycle = R(CYC4),
.pulse = R(PROG4_PULSE),
.fifo_tai_l = R(TSF4_R0),
.fifo_tai_h = R(TSF4_R1),
.fifo_cycle = R(TSF4_R2),
.fifo_status = R(TSF4_CSR),
}
};
/* FIXME: should this access use fmc_readl/writel? */
static int wrn_dio_cmd_pulse(struct wrn_drvdata *drvdata,
struct wr_dio_cmd *cmd)
{
struct DIO_WB __iomem *dio = drvdata->wrdio_base;
void __iomem *base = dio;
struct PPSG_WB __iomem *ppsg = drvdata->ppsg_base;
void __iomem *p;
struct regmap *map;
struct timespec *ts;
uint32_t val;
if (cmd->channel > 4)
return -EINVAL; /* FIXME: mask */
map = regmap + cmd->channel;
/* First, put this bit as output (FIXME: plain GPIO support?) */
val = readl(&dio->OUT) | (1 << cmd->channel);
......@@ -63,22 +126,16 @@ static int wrn_dio_cmd_pulse(struct wrn_drvdata *drvdata,
/* if not "now", set trig, trigh, cycles */
if (!(cmd->flags & WR_DIO_F_NOW)) {
/* not now: set relevant registers */
p = &dio->TRIG0;
p += (cmd->channel * 12);
printk("%i -> %p\n", GET_HI32(ts->tv_sec), p + 4);
writel(GET_HI32(ts->tv_sec), p + 4);
printk("%li -> %p\n", ts->tv_sec, p);
writel(ts->tv_sec, p);
printk("%li -> %p\n", ts->tv_nsec / 8, p + 8);
writel(ts->tv_nsec / 8, p + 8);
printk("%x %x %x\n", map->trig_h, map->trig_l, map->cycle);
writel(GET_HI32(ts->tv_sec), base + map->trig_h);
writel(ts->tv_sec, base + map->trig_l);
writel(ts->tv_nsec / 8, base + map->cycle);
}
/* set the width */
ts++;
p = &dio->PROG0_PULSE;
p += cmd->channel * 4;
printk("%li -> %p\n", ts->tv_nsec / 8, p);
writel(ts->tv_nsec / 8, p);
printk("%x\n", map->pulse);
writel(ts->tv_nsec / 8, base + map->pulse);
/* no loop yet (FIXME: interrupts) */
......
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