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# PXIe controller COM Express based
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## Project description
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This project is a PXIe system controller that is based on a [COM Express](https://www.picmg.org/openstandards/com-express) Computer on Module.
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![](https://www.picmg.org/wp-content/uploads/Untitled-7-348x2321.png)
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**Example of a COM Express module used on the PXIe controller**
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## Main Features
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- Compliance with [COM Express](https://www.picmg.org/openstandards/com-express/) Compact Pin-out type 6
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- Compliance with [PXIe standard for system controller slot](http://www.pxisa.org/userfiles/files/Specifications/PXIEXPRESS_HW_SPEC_R1.PDF)
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- PCIe lane should be designed to meet PCIe GEN 3
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- 16x PCIe lanes should be routed to PXIe backplane connector
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- Possibility to install a mSATA SSD
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- 1x RS232/422/485 port DSUB9 connector on front panel
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- 4x USB 2.0 on the front panel
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- 2x USB 3.0 on the front panel
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- 2x 10/100/1000 Ethernet LAN on the front panel
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- 1x DisplayPort on the front panel
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- PXIe trigger controller connected to COM Express LPC bus
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- 1x SMB PXIe trigger line on front panel
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-----
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## Project information
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- Official production documentation
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- Users
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- Software
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- Frequently Asked Questions
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-----
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## Contacts
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### Commercial producers
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- Foreseen to be commercially available once the development is finished.
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### General questions about project
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- [Paul Peronnard](mailto:Paul.Peronnard@cern.ch) - CERN
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- [Erik van der Bij](mailto:Erik.van.der.Bij@cern.ch) - CERN
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-----
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## Status
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| Date | Event |
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| --------- | ------ |
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| 24-01-2019| First specifications written.|
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| 05-04-2019| Order sent out for a pre-study |
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-----
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5 April 2019 |
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\ No newline at end of file |