... | ... | @@ -57,18 +57,19 @@ This project is a PXIe system controller that is based on a [COM Express](https: |
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| 24-01-2019| First specifications written.|
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| 05-04-2019| Order sent out for a pre-study |
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| 05-04-2019| Order sent out for a pre-study. |
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| 21-06-2019| Pre-study ready. |
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| 27-06-2019| Review of pre-study. |
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| 24-10-2019| Start of schematics design |
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| 24-10-2019| Start of schematics design. |
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| 05-12-2019| [First version of schematics design (v0.1)](PXIeCOMe-V0_1) made. Review will be held. |
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| 09-04-2020| Schematics review held. |
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| 06-2020| PCB layout in progress |
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| 08-2020| PCB ready for review |
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| 10-2020| PCB ready for manufacturing |
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| 15-12-2020| Five prototypes ordered, for delivery by ~~end-March~~ end-May 2021 |
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| 26-05-2021| Five modules ready and tested.
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| 06-2020| PCB layout in progress. |
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| 08-2020| PCB ready for review. |
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| 10-2020| PCB ready for manufacturing. |
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| 15-12-2020| Five V0.4 prototypes ordered, for delivery by ~~end-March~~ end-May 2021. |
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| 26-05-2021| Five V0.4 modules ready and tested.
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| 04-06-2021| V1.0 design will be made by CERN's design office. |
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26 May 2021 |
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\ No newline at end of file |
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4 June 2021 |
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\ No newline at end of file |