... | ... | @@ -28,7 +28,7 @@ This project is a PXIe system controller that is based on a [COM Express](https: |
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- 1x SMB Trigger line
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- Xilinx XC7A50T-1FTG256C FPGA for trigger management
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**Table: PXIe Link to COMe PCIe lanes mapping**
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#### Table: PXIe Link to COMe PCIe lanes mapping
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| PXIe Link | COMe Lane |
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| --------- | --------------- |
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... | ... | |