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fe9a3504
Commit
fe9a3504
authored
Jul 12, 2013
by
Matthieu Cattin
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fmc_adc_spec: Fix wrong wishbone module base addresses.
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31ef596d
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fmc_adc_spec.py
test/fmcadc100m14b4cha/python/fmc_adc_spec.py
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test/fmcadc100m14b4cha/python/fmc_adc_spec.py
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fe9a3504
...
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@@ -39,8 +39,8 @@ class CFmcAdc100mSpec:
GNUM_DMA_CSR_ADDR
=
0x1000
ONEWIRE_ADDR
=
0x1100
CSR_ADDR
=
0x1200
UTC_CORE_ADDR
=
0x
13
00
IRQ_CONTROLLER_ADDR
=
0x1
4
00
UTC_CORE_ADDR
=
0x
20
00
IRQ_CONTROLLER_ADDR
=
0x1
3
00
# Onewire core port
DS18B20_PORT
=
0
...
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