Commit e42c469e authored by Evangelia Gousiou's avatar Evangelia Gousiou

updated readme on vhdl folder

parent f2b9f69a
These folders include the python and vhdl files of the SPEC PTS tests.
HDL files of the SPEC150 PTS tests.
Here is the correspondance between test numbers, python files and FPGA binary files:
Here is the correspondence between test numbers, python files and FPGA binary files: -> spec_pts_fmcsupply.bin -> spec_pts_fmcconnect.bin
......@@ -13,9 +13,7 @@ -> spec_pts_vcxo_pll.bin -> spec_pts_tempid.bin -> spec_pts_usb
All FPGA designs make use of the hdlmake utility.
During hdlmake there designs use the sdb_extention branch of the general-cores git.
This branch however causes some small problems regarding the genrams during hdlmake and make.
For this reason the directory ./general-cores contains some files which should to be copied
to the ./ip-cores/general-cores directory to fix these problems.
Tests 00 and 12 do not load a binary to the FPGA.
To resynthesize the HDL, please use directly the .ise projects;
issues with submodules Manifests create problems to hdlmake.
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