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5a5c5d39
Commit
5a5c5d39
authored
May 23, 2012
by
Matthieu Cattin
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test02: Uses common modules, added exception handling.
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test02.py
test/fmcadc100m14b4cha/python/test02.py
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test/fmcadc100m14b4cha/python/test02.py
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5a5c5d39
...
...
@@ -5,73 +5,116 @@
# Author: Matthieu Cattin <matthieu.cattin@cern.ch>
# Licence: GPL v2 or later.
# Website: http://www.ohwr.org
# Last modifications: 23/5/2012
# Import system modules
import
sys
import
rr
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../gnurabbit/python/'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
import
rr
import
csr
import
fmc_adc
# Import specific modules
from
fmc_adc_spec
import
*
from
fmc_adc
import
*
"""
test02: Test EEPROM
test02: Test EEPROM
access
Note: Requires test00.py to run first to load the firmware!
"""
EEPROM_ADDR
=
0x50
def
pattern_compare
(
fmc
,
pattern
):
print
"Write data pattern to EEPROM
\n
"
#print [hex(a) for a in pattern]
fmc
.
sys_i2c_eeprom_write
(
pattern
)
print
"Read back data from EEPROM
\n
"
rd_pattern
=
fmc
.
sys_i2c_eeprom_read
(
0x0
,
len
(
pattern
))
#print [hex(a) for a in rd_pattern]
print
"Data comparison:"
print
"written read => result"
mismatch
=
0
for
i
in
range
(
len
(
pattern
)):
if
(
rd_pattern
[
i
]
!=
pattern
[
i
]):
check
=
"MISMATCH"
mismatch
+=
1
else
:
check
=
"OK"
print
"0x
%02
X 0x
%02
X =>
%
s"
%
(
pattern
[
i
],
rd_pattern
[
i
],
check
)
print
""
return
mismatch
def
main
(
default_directory
=
'.'
):
"""
path_fpga_loader = '../../../gnurabbit/user/fpga_loader';
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin';
# Constants declaration
TEST_NB
=
2
EXPECTED_BITSTREAM_TYPE
=
0x1
EEPROM_ADDR
=
0x50
PATTERN_A
=
[
0x55
,
0xAA
,
0x00
,
0xFF
]
PATTERN_B
=
[
0xAA
,
0x55
,
0xFF
,
0x00
]
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
start_test_time
=
time
.
time
()
print
"================================================================================"
print
"Test
%02
d start
\n
"
%
TEST_NB
time.sleep(2);
"""
# SPEC object declaration
print
"Loading hardware access library and opening device.
\n
"
spec
=
rr
.
Gennum
()
# Objects declaration
spec
=
rr
.
Gennum
()
# bind to the SPEC board
fmc
=
fmc_adc
.
CFmcAdc100Ms
(
spec
)
# Carrier object declaration (SPEC board specific part)
# Used to check that the firmware is loaded.
try
:
carrier
=
CFmcAdc100mSpec
(
spec
,
EXPECTED_BITSTREAM_TYPE
)
except
FmcAdc100mSpecOperationError
as
e
:
raise
PtsCritical
(
"Carrier init failed, test stopped:
%
s"
%
e
)
# Mezzanine object declaration (FmcAdc100m14b4cha board specific part)
try
:
fmc
=
CFmcAdc100m
(
spec
)
except
FmcAdc100mOperationError
as
e
:
raise
PtsCritical
(
"Mezzanine init failed, test stopped:
%
s"
%
e
)
# Scan FMC system i2c bus
periph_addr
=
fmc
.
sys_i2c_scan
()
print
""
# Check that the EEPROM is detected on the I2C bus
if
(
0
==
len
(
periph_addr
)):
raise
PtsError
(
'No peripheral detected on system management I2C bus'
)
else
:
if
(
1
!=
len
(
periph_addr
)):
raise
PtsError
(
'Signal integrity problem detected on system management I2C bus,
%
d devices detected instead of 1'
%
(
len
(
periph_addr
)))
else
:
if
(
EEPROM_ADDR
!=
periph_addr
[
0
]):
raise
PtsError
(
'Wrong device mounted on system management I2C bus, address is:0x
%.2
X expected:0x
%.2
X'
%
(
periph_addr
[
0
],
EEPROM_ADDR
))
# Write, read back and compare
addr
=
0x20
wr_data
=
[
0x55
,
0xAA
,
0x00
,
0xFF
]
rd_data
=
[]
print
(
'Write data at EEPROM address:0x
%.2
X'
)
%
addr
print
wr_data
fmc
.
sys_i2c_eeprom_write
(
addr
,
wr_data
)
time
.
sleep
(
0.1
)
print
(
'Read back data from EEPROM address:0x
%.2
X'
)
%
addr
rd_data
=
fmc
.
sys_i2c_eeprom_read
(
addr
,
len
(
wr_data
))
print
rd_data
if
(
rd_data
!=
wr_data
):
raise
PtsError
(
'Cannot access EEPROM at address:0x
%.2
X'
%
(
EEPROM_ADDR
))
raise
PtsError
(
"No peripheral detected on system management I2C bus"
)
if
(
1
!=
len
(
periph_addr
)):
raise
PtsError
(
"Signal integrity problem detected on system management I2C bus,
%
d devices detected instead of 1"
%
len
(
periph_addr
))
if
(
EEPROM_ADDR
!=
periph_addr
[
0
]):
raise
PtsError
(
"Wrong device mounted on system management I2C bus or soldering issues, address is:0x
%.2
X expected:0x
%.2
X"
%
(
periph_addr
[
0
],
EEPROM_ADDR
))
# Write, read back and compare two different patterns
try
:
mismatch
=
0
mismatch
+=
pattern_compare
(
fmc
,
PATTERN_A
)
mismatch
+=
pattern_compare
(
fmc
,
PATTERN_B
)
except
FmcAdc100mOperationError
as
e
:
raise
PtsError
(
"EEPROM write/read/compare test failed:
%
s"
%
e
)
if
(
mismatch
!=
0
):
raise
PtsError
(
"EEPROM data comparison mismatch!"
)
else
:
print
(
'Data comparison OK.'
)
print
""
print
"==> End of test
%02
d"
%
TEST_NB
print
"================================================================================"
end_test_time
=
time
.
time
()
print
"Test
%02
d elapsed time:
%.2
f seconds
\n
"
%
(
TEST_NB
,
end_test_time
-
start_test_time
)
if
__name__
==
'__main__'
:
main
()
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