Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
P
Production Test Suite - base
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
1
Merge Requests
1
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Production Test Suite - base
Commits
242d2a86
Commit
242d2a86
authored
Dec 18, 2013
by
Matthieu Cattin
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
svec many: Change interrupt scheme, now uses two stages (eic + vic).
parent
f2c2ff91
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
4 additions
and
1 deletion
+4
-1
rr2vv.py
common/rr2vv.py
+4
-1
No files found.
common/rr2vv.py
View file @
242d2a86
...
...
@@ -36,8 +36,11 @@ class VME_rr_compatible(VME):
raise
BusWarning
(
"Warning: VME __init__: Bad lun, default to 0"
)
def
iread
(
self
,
bar
,
offset
,
width
):
return
self
.
vv_read
(
offset
)
data
=
self
.
vv_read
(
offset
)
#print("vv_read : offset:0x%4x data:0x%08x"%(offset, data))
return
data
def
iwrite
(
self
,
bar
,
offset
,
width
,
datum
):
#print("vv_write: offset:0x%4x data:0x%08x"%(offset, datum))
return
self
.
vv_write
(
offset
,
datum
)
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment