Commit 242d2a86 authored by Matthieu Cattin's avatar Matthieu Cattin

svec many: Change interrupt scheme, now uses two stages (eic + vic).

parent f2c2ff91
......@@ -36,8 +36,11 @@ class VME_rr_compatible(VME):
raise BusWarning("Warning: VME __init__: Bad lun, default to 0")
def iread(self, bar, offset, width):
return self.vv_read(offset)
data = self.vv_read(offset)
#print("vv_read : offset:0x%4x data:0x%08x"%(offset, data))
return data
def iwrite(self, bar, offset, width, datum):
#print("vv_write: offset:0x%4x data:0x%08x"%(offset, datum))
return self.vv_write(offset, datum)
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