... | ... | @@ -13,16 +13,9 @@ page](https://ohwr-gitlab.cern.ch/project/pcie-fmc-soc-vdas/wiki) |
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The FMC PCIe Carrier is an FMC carrier that can hold one FMC card and an
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SFP connector. On the PCIe side it has a 4-lane interface, while the FMC
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mezzanine slot uses a low-pin count connector. This board is optimised
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mezzanine slot uses a high-pin count connector. This board is optimised
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for cost and is usable with most of the FMC cards designed within the
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OHR project (e.g. ADC cards, Fine Delay). The board is [commercially
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available](https://ohwr-gitlab.cern.ch/project/spec/wiki#commercial-producers).
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Labview and Linux drivers are available for the [FMC DEL 1ns 4cha
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delay](https://ohwr-gitlab.cern.ch/project/fmc-delay-1ns-8cha/wiki) and
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[FMC
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TDC 1ns 5cha](https://ohwr-gitlab.cern.ch/project/fmc-tdc/wiki)
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TDC mezzanine cards.
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OHR project (e.g. ADC cards, Fine Delay).
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Boards with a very similar architecture are available for the VME bus
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([SVEC - Simple VME FMC Carrier
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... | ... | @@ -39,7 +32,7 @@ Projects](https://ohwr-gitlab.cern.ch/project/fmc-projects). |
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- 4-lane PCIe (Gennum GN4124)
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- 1x Xilinx Spartan6 FPGA (XC6SLX45T-3FGG484C)
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- FMC slot with low pin count (LPC) connector
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- FMC slot with high pin count (HPC) connector
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- Vadj fixed to 2.5V
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- FMC connectivity: all 34 differential pairs connected, 1 GTP
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transceiver with clock, 2 clock pairs, JTAG
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