Commit c67962e6 authored by palvarez's avatar palvarez

git-svn-id: http://svn.ohwr.org/cern-fip/trunk/hdl/design@131 7f0067c9-7624-46c7-bd39-3fb5400c0213
parent d7d153e9
WF_inputs_synchronizer.vhd
Considering radiation hardness registering constant inputs on three flip flops is probably a weekness. Proabably one tmr flip-flop would be enough.
Considering radiation hardness registering constant inputs on three flip flops stages is probably a weekness. Proabably only one TMR flip-flop per input would be enough.
The wishbone bus is actually properly implemented as it removes any flip-flops from the data and address bus. Notice that the traditional synchronous implementation would require to register the data and address on the IOs, preventing the use of TMR flip-flops.
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