Commit 875b75fc authored by Alén Arias Vázquez's avatar Alén Arias Vázquez 😎

test instead with 32bit counter

parent 0715c4e2
......@@ -184,8 +184,9 @@ architecture rtl of wf_reset_unit is
type rstin_st_t is (IDLE, RSTIN_EVAL, nFIP_ON_FD_ON, nFIP_OFF_FD_ON, nFIP_OFF_FD_OFF);
signal rstin_st, nx_rstin_st : rstin_st_t;
-- RSTIN counter
signal s_rstin_c, s_var_rst_c : unsigned (c_2_PERIODS_COUNTER_LGTH-1 downto 0);
signal s_rstin_c_reinit, s_rstin_c_is_three : std_logic;
signal s_rstin_c : unsigned (c_2_PERIODS_COUNTER_LGTH-1 downto 0);
signal s_var_rst_c : unsigned (c_2_PERIODS_COUNTER_LGTH+19 downto 0);
signal s_rstin_c_reinit, s_rstin_c_is_three : std_logic;
signal s_rstin_c_is_seven, s_rstin_c_is_4txck : std_logic;
signal s_rstin_c_is_full : std_logic;
-- resets generated after a RSTIN
......@@ -195,7 +196,7 @@ architecture rtl of wf_reset_unit is
VAR_RST_nFIP_OFF_FD_ON_RSTON_ON, VAR_RST_nFIP_ON_FD_ON,
VAR_RST_nFIP_OFF_FD_ON_RSTON_OFF);
signal var_rst_st, nx_var_rst_st : var_rst_st_t;
-- var_rst counter
-- var_rst counter
signal s_var_rst_c_reinit, s_var_rst_c_is_three : std_logic;
signal s_var_rst_c_is_seven, s_var_rst_c_is_4txck : std_logic;
signal s_var_rst_c_is_full : std_logic;
......@@ -656,7 +657,7 @@ RSTIN_free_counter: wf_incr_counter
-- s_var_rst_c_is_full will be activated and the FSM will be reset.
free_counter: wf_incr_counter
generic map(g_counter_lgth => c_2_PERIODS_COUNTER_LGTH)
generic map(g_counter_lgth => c_2_PERIODS_COUNTER_LGTH+20)
port map(
uclk_i => uclk_i,
counter_reinit_i => s_var_rst_c_reinit,
......@@ -667,8 +668,8 @@ free_counter: wf_incr_counter
----------------------------------------
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
s_var_rst_c_is_seven <= '1' when s_var_rst_c = to_unsigned(7, s_var_rst_c'length) else '0';
s_var_rst_c_is_three <= '1' when s_var_rst_c = to_unsigned(3, s_var_rst_c'length) else '0';
s_var_rst_c_is_seven <= '1' when s_var_rst_c = to_unsigned(2147483648, s_var_rst_c'length) else '0';
s_var_rst_c_is_three <= '1' when s_var_rst_c = to_unsigned(1073741824, s_var_rst_c'length) else '0';
s_var_rst_c_is_4txck <= '1' when s_var_rst_c = s_txck_four_periods -1 else '0';
......
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