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Mock Turtle
Commits
87e2e570
Commit
87e2e570
authored
May 08, 2019
by
Federico Vaga
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Merge branch 'feature/docupgrade' into develop
parents
92335dd9
22416087
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11 changed files
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43 additions
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20 deletions
+43
-20
README.rst
README.rst
+2
-2
architecture.rst
doc/architecture.rst
+1
-1
fmc-spec-carrier.rst
doc/demos/fmc-spec-carrier.rst
+4
-4
fmc-svec-carrier.rst
doc/demos/fmc-svec-carrier.rst
+4
-4
index.rst
doc/hdl/index.rst
+4
-4
index-fw.rst
doc/software/index-fw.rst
+1
-1
linux-driver.rst
doc/software/linux-driver.rst
+6
-0
index.rst
doc/tools/index.rst
+1
-0
mockturtle-gdbserver.rst
doc/tools/mockturtle-gdbserver.rst
+16
-0
synthesis_descriptor.vhd
hdl/testbench/spec_mt_demo/synthesis_descriptor.vhd
+2
-2
synthesis_descriptor.vhd
hdl/testbench/svec_mt_demo/synthesis_descriptor.vhd
+2
-2
No files found.
README.rst
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87e2e570
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@@ -120,10 +120,10 @@ Mock Turtle is officially hosted on the `Open Hardware Repository`_:
`Mock Turtle`_. This project is distributed as a git repository which can
be cloned using the following command::
git clone https://
@ohwr.org/gitolite/hdl-core-lib
/mock-turtle.git
git clone https://
ohwr.org/project
/mock-turtle.git
In it you can find all sources: HDL, software, demos, tests and this
documentation.
.. _`Open Hardware Repository`: https://www.ohwr.org/
.. _`Mock Turtle`: https://www.ohwr.org/project
s
/mock-turtle/repository
.. _`Mock Turtle`: https://www.ohwr.org/project/mock-turtle/repository
doc/architecture.rst
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87e2e570
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@@ -43,7 +43,7 @@ runs. Any kind of bus controller, or device must be connected externally as a
The memory size for code and data is :ref:`configurable at synthesis time <hdl:cfg>`.
.. _uRV processor: https://www.ohwr.org/project
s
/urv-core
.. _uRV processor: https://www.ohwr.org/project/urv-core
.. _`RISC-V`: https://riscv.org/
For more information about how to handle cores from software, please read:
...
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doc/demos/fmc-spec-carrier.rst
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@@ -123,7 +123,7 @@ This firmware does the following things:
.. highlight:: c
.. literalinclude:: ../../demos/fmc-spec-carrier/software/firmware/fw-02/fw-spec.c
.. _`FMC SPEC carrier`: https://www.ohwr.org/project
s
/spec/
.. _GN4124 core: https://www.ohwr.org/project
s
/gn4124-core/wiki
.. _Hdlmake: https://www.ohwr.org/project
s
/hdl-make/wiki
.. _OHWR general-cores: https://www.ohwr.org/project
s
/general-cores/wiki
.. _`FMC SPEC carrier`: https://www.ohwr.org/project/spec/
.. _GN4124 core: https://www.ohwr.org/project/gn4124-core/wiki
.. _Hdlmake: https://www.ohwr.org/project/hdl-make/wiki
.. _OHWR general-cores: https://www.ohwr.org/project/general-cores/wiki
doc/demos/fmc-svec-carrier.rst
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@@ -162,7 +162,7 @@ the possibility to play with LEDs and LEMOs status.
.. literalinclude:: ../../demos/fmc-svec-carrier/software/tools/mockturtle-svec.c
.. _`FMC SVEC carrier`: https://www.ohwr.org/project
s
/svec/
.. _Hdlmake: https://www.ohwr.org/project
s
/hdl-make/wiki
.. _VME64x core: https://www.ohwr.org/project
s
/vme64x-core/wiki
.. _OHWR general-cores: https://www.ohwr.org/project
s
/general-cores/wiki
.. _`FMC SVEC carrier`: https://www.ohwr.org/project/svec/
.. _Hdlmake: https://www.ohwr.org/project/hdl-make/wiki
.. _VME64x core: https://www.ohwr.org/project/vme64x-core/wiki
.. _OHWR general-cores: https://www.ohwr.org/project/general-cores/wiki
doc/hdl/index.rst
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87e2e570
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@@ -472,10 +472,10 @@ The expected output from the simulation is::
The mock_turtle_core testbench expects an already compiled software binary under
*tests/firmware/sim-verif*. Please compile the software prior to running the simulation.
.. _OHWR general-cores: https://www.ohwr.org/project
s
/general-cores/wiki
.. _White Rabbit PTP Core: https://www.ohwr.org/project
s
/wr-cores/wiki/Wrpc_core/wiki
.. _Hdlmake: https://www.ohwr.org/project
s
/hdl-make/wiki
.. _uRV processor: https://www.ohwr.org/project
s
/urv-core/wiki
.. _OHWR general-cores: https://www.ohwr.org/project/general-cores/wiki
.. _White Rabbit PTP Core: https://www.ohwr.org/project/wr-cores/wiki/Wrpc_core/wiki
.. _Hdlmake: https://www.ohwr.org/project/hdl-make/wiki
.. _uRV processor: https://www.ohwr.org/project/urv-core/wiki
.. _Git submodules: https://git-scm.com/book/en/Git-Tools-Submodules
.. highlight:: none
doc/software/index-fw.rst
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@@ -158,7 +158,7 @@ At this point you can call ``make(1)`` to build your firmware.
`soft-cpu toolchain`_ project on the `OHWR`_.
.. _`OHWR`: https://www.ohwr.org/
.. _`soft-cpu toolchain`: https://www.ohwr.org/project
s
/soft-cpu-toolchains/wiki/wiki
.. _`soft-cpu toolchain`: https://www.ohwr.org/project/soft-cpu-toolchains/wiki/wiki
.. toctree::
...
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doc/software/linux-driver.rst
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@@ -265,4 +265,10 @@ This is typically used by driver developers for debugging purposes.
.. warning:: Its content it is not stable and it may change at anytime.
Do not consider this as a stable interface.
Then, there is a debugfs file for each Mock Turtle instance that can be
used to access the CPU debug registers. These files are named using the
following format "trtl-%0x4x-dbg". These files can be accessed only with
``mmap(2)`` and typically the user does not need to use it directly, instead
the user should use the :ref:`Mock Turtle GDB Server <tools:mockturtle-gdbserver>`.
.. [1] https://www.kernel.org/doc/Documentation/driver-model/platform.txt
doc/tools/index.rst
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@@ -22,3 +22,4 @@ message. All tools are available in the directory *software/tools*.
mockturtle-variable
mockturtle-buffer
mockturtle-debug
mockturtle-gdbserver
doc/tools/mockturtle-gdbserver.rst
0 → 100644
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87e2e570
.. _tools:mockturtle-gdbserver:
======================
Mock Turtle GDB Server
======================
The Mock Turtle GDB Server application (*mockturtle-gdbserver*) provides
access to the Mock Turtle CPU debug interface. The user can start the server
against a Mock Turtle instance and start debugging remotly using ``gdb(1)``.
This debug interface is accessible only if the Linux debugfs file-system is
mounted at ``/sys/kernel/debug``; be sure to run the following command before
starting the *mockturtle-gdbserver*:::
mount -t debugfs none /sys/kernel/debug
Please refer to the application help message for more information.
hdl/testbench/spec_mt_demo/synthesis_descriptor.vhd
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@@ -5,10 +5,10 @@
-- Tuesday, March 13 2018
--
-- ../../ip_cores/general-cores/tools/sdb_desc_gen.tcl is part of OHWR general-cores:
-- https://www.ohwr.org/project
s
/general-cores/wiki
-- https://www.ohwr.org/project/general-cores/wiki
--
-- For more information on SDB meta information, see also:
-- https://www.ohwr.org/project
s
/sdb/wiki
-- https://www.ohwr.org/project/sdb/wiki
--------------------------------------------------------------------------------
library
ieee
;
...
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hdl/testbench/svec_mt_demo/synthesis_descriptor.vhd
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@@ -5,10 +5,10 @@
-- Tuesday, March 13 2018
--
-- ../../ip_cores/general-cores/tools/sdb_desc_gen.tcl is part of OHWR general-cores:
-- https://www.ohwr.org/project
s
/general-cores/wiki
-- https://www.ohwr.org/project/general-cores/wiki
--
-- For more information on SDB meta information, see also:
-- https://www.ohwr.org/project
s
/sdb/wiki
-- https://www.ohwr.org/project/sdb/wiki
--------------------------------------------------------------------------------
library
ieee
;
...
...
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