V
VHDL macro libraries for Microsemi ProASIC3
This is a collection of simple macro implementations for Microsemi's ProASIC3 FPGAs to allow simulating post-synthesis designs using GHDL.
Project ID: 11177
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Christos Gentsos authored7055c055
| Name |
Last commit
|
Last update |
|---|---|---|
| INC8 | ||
| delay | ||
| proasic3 | ||
| proasic3_mod | ||
| smartfusion2 | ||
| vhpiregflip | ||
| LICENSE | ||
| README.md | ||
| gate_functions.txt | ||
| runme.sh |