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MasterFIP - Gateware
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MasterFIP - Gateware
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71c1e1376e9e7090b4de617454821eadc9487f20
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-rx: rearranged bytes within a 32bit reg for the last reg of a frame
· 71c1e137
Evangelia Gousiou
authored
Oct 21, 2015
-fmc_masterfip_csr.vhd: macrocyc, turnar and silen counters are 31bits not 32
71c1e137
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ip_cores
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sim/spec
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