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MasterFIP - Gateware
Commits
aee3f6af
Commit
aee3f6af
authored
Mar 29, 2023
by
kblantos
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Experiments with main TB. Several testcases passed in simulation
parent
d4d4c3ce
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5 changed files
with
1159 additions
and
324 deletions
+1159
-324
main.sv
testbench/top_mt/main.sv
+192
-314
main_with_macrocycle_config.sv
testbench/top_mt/main_with_macrocycle_config.sv
+786
-0
masterfip_driver.svh
testbench/top_mt/masterfip_driver.svh
+8
-8
test_mstrfip_startup.sv
testbench/top_mt/test_mstrfip_startup.sv
+171
-0
wave.do
testbench/top_mt/wave.do
+2
-2
No files found.
testbench/top_mt/main.sv
View file @
aee3f6af
This diff is collapsed.
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testbench/top_mt/main_with_macrocycle_config.sv
0 → 100644
View file @
aee3f6af
This diff is collapsed.
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testbench/top_mt/masterfip_driver.svh
View file @
aee3f6af
...
...
@@ -212,19 +212,19 @@ class MasterfipDriver;
l
.
msg
(
0
,
$
sformatf
(
"Read App ID: 0x%x"
,
id
))
;
if
(
id
!=
MSTRFIP_APP_ID
)
begin
l
.
fail
($
sformatf
(
" Incorrect App ID: 0x%x, expected %x"
,
id
,
MSTRFIP_APP_ID
))
;
return
;
end
begin
l
.
fail
($
sformatf
(
" Incorrect App ID: 0x%x, expected %x"
,
id
,
MSTRFIP_APP_ID
))
;
return
;
end
core_count
=
m_mt
.
rom
.
getCoreCount
()
;
l
.
msg
(
0
,
$
sformatf
(
"Read CPU core count: %d"
,
core_count
))
;
if
(
core_count
!=
2
)
begin
l
.
fail
($
sformatf
(
"Incorrect CPU cores number: %d, expected 2"
,
core_count
))
;
return
;
end
begin
l
.
fail
($
sformatf
(
"Incorrect CPU cores number: %d, expected 2"
,
core_count
))
;
return
;
end
l
.
pass
()
;
endtask
// init
...
...
testbench/top_mt/test_mstrfip_startup.sv
0 → 100644
View file @
aee3f6af
module
test_startup
(
input
logic
spi_clk
,
input
logic
spi_cs_n
,
output
logic
spi_mosi
)
;
// Write SPI mosi data task. Used to generate MOSI data
task
write_spi
(
input
logic
[
31
:
0
]
mosi_spi_data
,
input
int
data_length
)
;
int
i
;
for
(
i
=
data_length
;
i
>
0
;
i
--
)
begin
@
(
posedge
spi_clk
)
;
spi_mosi
=
mosi_spi_data
[
i
-
1
]
;
end
endtask
task
send_rst
(
input
logic
spi_cs_n
,
input
logic
spi_clk
)
;
$
display
(
" **** Starting sending the 1st frame ****"
)
;
spi_cs_n
=
'b0
;
write_spi
(
'h60700
,
32
)
;
write_spi
(
'h3000001
,
32
)
;
write_spi
(
'h10007
,
32
)
;
write_spi
(
'h8014c90
,
32
)
;
write_spi
(
'h3
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'hff8e
,
32
)
;
write_spi
(
'h1921d
,
32
)
;
write_spi
(
'h202952ec
,
32
)
;
write_spi
(
'h8000d34
,
32
)
;
write_spi
(
'h2029535c
,
32
)
;
write_spi
(
'h2029535c
,
32
)
;
@
(
posedge
spi_clk
)
;
spi_cs_n
=
'b1
;
endtask
// send_rst
task
send_worldfip_speed
(
input
logic
spi_cs_n
,
input
logic
spi_clk
)
;
$
display
(
" **** Starting sending the 2nd frame ****"
)
;
spi_cs_n
=
'b0
;
write_spi
(
'h50300
,
32
)
;
write_spi
(
'h1000000
,
32
)
;
write_spi
(
'h20003
,
32
)
;
write_spi
(
'h8014c90
,
32
)
;
write_spi
(
'h10b5a
,
32
)
;
write_spi
(
'h1
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h2029535c
,
32
)
;
@
(
posedge
spi_clk
)
;
spi_cs_n
=
'b1
;
endtask
// worldfip_speed
task
hw_config_set
(
input
logic
spi_cs_n
,
input
logic
spi_clk
)
;
$
display
(
" **** Starting sending the 3rd frame ****"
)
;
spi_cs_n
=
'b0
;
write_spi
(
'h50800
,
32
)
;
write_spi
(
'h2000000
,
32
)
;
write_spi
(
'h30008
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h2
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h1
,
32
)
;
write_spi
(
'hbb8
,
32
)
;
write_spi
(
'h2d50
,
32
)
;
write_spi
(
'h28
,
32
)
;
@
(
posedge
spi_clk
)
;
spi_cs_n
=
'b1
;
endtask
// hw_config_set
task
send_first_msg
(
input
logic
spi_cs_n
,
input
logic
spi_clk
)
;
$
display
(
" **** Starting sending the 3rd frame ****"
)
;
spi_cs_n
=
'b0
;
write_spi
(
'h56400
,
32
)
;
write_spi
(
'ha000000
,
32
)
;
write_spi
(
'h40064
,
32
)
;
write_spi
(
'h431bde83
,
32
)
;
write_spi
(
'ha
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h125d90
,
32
)
;
write_spi
(
'h1
,
32
)
;
write_spi
(
'h55
,
32
)
;
write_spi
(
'h8014d42
,
32
)
;
write_spi
(
'h22
,
32
)
;
write_spi
(
'h8014c98
,
32
)
;
write_spi
(
'h201dfb30
,
32
)
;
write_spi
(
'h201dfcc4
,
32
)
;
write_spi
(
'h80000013
,
32
)
;
write_spi
(
'h6
,
32
)
;
write_spi
(
'h201dfb30
,
32
)
;
write_spi
(
'h8014c98
,
32
)
;
write_spi
(
'h12c
,
32
)
;
write_spi
(
'h201e79ac
,
32
)
;
write_spi
(
'h17562
,
32
)
;
write_spi
(
'h1fa7
,
32
)
;
write_spi
(
'h202952ec
,
32
)
;
write_spi
(
'h8014d1c
,
32
)
;
write_spi
(
'h201de574
,
32
)
;
write_spi
(
'h201de504
,
32
)
;
write_spi
(
'h23fffe00
,
32
)
;
write_spi
(
'hdc000221
,
32
)
;
write_spi
(
'h21
,
32
)
;
write_spi
(
'h21
,
32
)
;
write_spi
(
'hd
,
32
)
;
write_spi
(
'hfffffff7
,
32
)
;
write_spi
(
'h8014d60
,
32
)
;
write_spi
(
'h20295664
,
32
)
;
write_spi
(
'h201def00
,
32
)
;
write_spi
(
'h8014d84
,
32
)
;
write_spi
(
'h22
,
32
)
;
write_spi
(
'h8014d8c
,
32
)
;
write_spi
(
'h202c12f0
,
32
)
;
write_spi
(
'h305b1b5d
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h32335b1b
,
32
)
;
write_spi
(
'h4b4f5b6d
,
32
)
;
write_spi
(
'h305b1b5d
,
32
)
;
write_spi
(
'h614d206d
,
32
)
;
write_spi
(
'h636f7263
,
32
)
;
write_spi
(
'h656c6379
,
32
)
;
write_spi
(
'h65726320
,
32
)
;
write_spi
(
'h64657461
,
32
)
;
write_spi
(
'hdead0a0d
,
32
)
;
write_spi
(
'hdeadbeef
,
32
)
;
write_spi
(
'h1
,
32
)
;
write_spi
(
'h202a8600
,
32
)
;
write_spi
(
'h8000ca4
,
32
)
;
write_spi
(
'h8000d34
,
32
)
;
write_spi
(
'h1
,
32
)
;
write_spi
(
'h202a8600
,
32
)
;
write_spi
(
'h8000ca4
,
32
)
;
write_spi
(
'h8000d34
,
32
)
;
write_spi
(
'h202c169c
,
32
)
;
write_spi
(
'h8000d34
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h2
,
32
)
;
write_spi
(
'h21
,
32
)
;
write_spi
(
'h202c137c
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h2
,
32
)
;
write_spi
(
'h1
,
32
)
;
write_spi
(
'h202c39a8
,
32
)
;
write_spi
(
'h8014e94
,
32
)
;
write_spi
(
'h201e25d0
,
32
)
;
write_spi
(
'h21
,
32
)
;
write_spi
(
'h201ef72c
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h8014db8
,
32
)
;
write_spi
(
'h1
,
32
)
;
write_spi
(
'h27
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h100
,
32
)
;
write_spi
(
'h23fffde0
,
32
)
;
write_spi
(
'h21
,
32
)
;
write_spi
(
'h5c64
,
32
)
;
write_spi
(
'h5bdc
,
32
)
;
write_spi
(
'h1
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h2029b75c
,
32
)
;
write_spi
(
'h2
,
32
)
;
write_spi
(
'h1
,
32
)
;
write_spi
(
'h2029b75c
,
32
)
;
write_spi
(
'h1765
,
32
)
;
write_spi
(
'h201f506c
,
32
)
;
write_spi
(
'h0
,
32
)
;
write_spi
(
'h1765
,
32
)
;
@
(
posedge
spi_clk
)
;
spi_cs_n
=
'b1
;
endtask
//send_first_msg
endmodule
testbench/top_mt/wave.do
View file @
aee3f6af
...
...
@@ -18,8 +18,9 @@ add wave -noupdate -expand -group TESTBENCH /main/q_miso_data
add wave -noupdate -expand -group TESTBENCH -unsigned /main/miso_cnt
add wave -noupdate -expand -group TESTBENCH /main/operation
add wave -noupdate -expand -group TESTBENCH -unsigned /main/data_len
add wave -noupdate -expand -group TESTBENCH -unsigned /main/rmq_id
add wave -noupdate -expand -group TESTBENCH /main/basic_info
add wave -noupdate -expand -group TESTBENCH /main/wr_rmq_id
add wave -noupdate -expand -group TESTBENCH /main/idx
# ERTEC
...
...
@@ -45,7 +46,6 @@ add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green -unsigned /m
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_state
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_mosi_data
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_data_valid
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_control
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green -unsigned /main/DUT/cmp_mt_profip_translator/s_wr_rmq_id
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green -unsigned /main/DUT/cmp_mt_profip_translator/s_wr_data_len
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green -unsigned /main/DUT/cmp_mt_profip_translator/s_wr_data_cnt
...
...
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