Skip to content

M
MasterFIP - Gateware
Commit 6c3d7aa0 authored by Evangelia Gousiou's avatar Evangelia Gousiou
Browse files
Options

corrected pinout ucf error on adc_5V_en

parent bc4cc976
Hide whitespace changes
Inline Side-by-side
Showing with 13 additions and 3 deletions
top/spec/spec_masterFIP.ucf
View file @ 6c3d7aa0
...@@ -67,6 +67,12 @@ NET "led_rx_err_n_o" IOSTANDARD = "LVCMOS25"; ...@@ -67,6 +67,12 @@ NET "led_rx_err_n_o" IOSTANDARD = "LVCMOS25";
NET "led_rx_act_n_o" LOC = A20; NET "led_rx_act_n_o" LOC = A20;
NET "led_rx_act_n_o" IOSTANDARD = "LVCMOS25"; NET "led_rx_act_n_o" IOSTANDARD = "LVCMOS25";
NET "led_sync_n_o" LOC = W10;
NET "led_sync_n_o" IOSTANDARD = "LVCMOS25";
NET "led_out_of_sync_n_o" LOC = Y10;
NET "led_out_of_sync_n_o" IOSTANDARD = "LVCMOS25";
NET "bus_term_en_n_o" LOC = Y13; NET "bus_term_en_n_o" LOC = Y13;
NET "bus_term_en_n_o" IOSTANDARD = "LVCMOS25"; NET "bus_term_en_n_o" IOSTANDARD = "LVCMOS25";
...@@ -91,7 +97,7 @@ NET "adc_1v8_shdn_n_o" IOSTANDARD = "LVCMOS25"; ...@@ -91,7 +97,7 @@ NET "adc_1v8_shdn_n_o" IOSTANDARD = "LVCMOS25";
NET "adc_m5v_shdn_n_o" LOC = W18; NET "adc_m5v_shdn_n_o" LOC = W18;
NET "adc_m5v_shdn_n_o" IOSTANDARD = "LVCMOS25"; NET "adc_m5v_shdn_n_o" IOSTANDARD = "LVCMOS25";
NET "adc_5v_en_n_o" LOC = R9; NET "adc_5v_en_n_o" LOC = R8;
NET "adc_5v_en_n_o" IOSTANDARD = "LVCMOS25"; NET "adc_5v_en_n_o" IOSTANDARD = "LVCMOS25";
#NET "mezz_onewire_b" LOC = "A19"; #NET "mezz_onewire_b" LOC = "A19";
......
top/spec/spec_masterFIP.vhd
View file @ 6c3d7aa0
...@@ -178,6 +178,8 @@ entity spec_masterFIP is ...@@ -178,6 +178,8 @@ entity spec_masterFIP is
led_tx_act_n_o : out std_logic; led_tx_act_n_o : out std_logic;
led_rx_err_n_o : out std_logic; led_rx_err_n_o : out std_logic;
led_rx_act_n_o : out std_logic; led_rx_act_n_o : out std_logic;
led_out_of_sync_n_o : out std_logic;
led_sync_n_o : out std_logic;
-- LEDs spec -- LEDs spec
led_green_o : out std_logic; led_green_o : out std_logic;
...@@ -386,7 +388,7 @@ begin ...@@ -386,7 +388,7 @@ begin
-- Interrupt interface -- Interrupt interface
dma_irq_o => open, dma_irq_o => open,
irq_p_i => '0', irq_p_i => '0',
irq_p_o => open, irq_p_o => irq_p_o,
-- CSR WISHBONE interface (master pipelined) -- CSR WISHBONE interface (master pipelined)
csr_clk_i => clk_40m_sys, csr_clk_i => clk_40m_sys,
csr_adr_o => gn_wb_adr, csr_adr_o => gn_wb_adr,
...@@ -511,9 +513,11 @@ begin ...@@ -511,9 +513,11 @@ begin
-- extended_o => rx_act); -- extended_o => rx_act);
led_tx_err_n_o <= aux(5); led_tx_err_n_o <= aux(5);
led_tx_act_n_o <= aux(0); led_tx_act_n_o <= aux(3);
led_rx_err_n_o <= aux(2); led_rx_err_n_o <= aux(2);
led_rx_act_n_o <= aux(6); led_rx_act_n_o <= aux(6);
led_out_of_sync_n_o <= aux(7);
led_sync_n_o <= aux(0);
--------------------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------------------
-- Carrier 1-wire MASTER DS18B20 (thermometer + unique ID) -- -- Carrier 1-wire MASTER DS18B20 (thermometer + unique ID) --
--------------------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------------------
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment