... | ... | @@ -10,10 +10,12 @@ This project provides gateware support for the |
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Put diagram of the gw architecture here\!
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\[Overview of the gateware architecture.\]
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### Supported carrier:
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### Hardware use
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- [SPEC](https://www.ohwr.org/project/spec/wikis), 1 slot PCIe FMC
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carrier.
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carrier
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- [FMC WorldFIP](https://www.ohwr.org/project/fmc-worldfip/wikis),
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WorldFIP driver PCB FMC mezzanine
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### Git sub-modules - To be updated:
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... | ... | @@ -78,9 +80,6 @@ asking for support on the mailing list. |
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## Contacts
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### Maintainers
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- [Matthieu Cattin](mailto:matthieu.cattin@cern.ch) - CERN
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- [Eva Gousiou](mailto:Eva.Gousiou@cern.ch) - CERN
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-----
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... | ... | @@ -101,10 +100,14 @@ asking for support on the mailing list. |
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<td>01-2015</td>
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<td>Start working on HDL specification</td>
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</tr>
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<tr class="even">
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<td>23-07-2015</td>
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<td>One board tested that sent and received WorldFIP data. ADC not tested.</td>
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</tr>
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</tbody>
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</table>
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-----
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Matthieu Cattin - January 2015
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Erik van der Bij - 31 July 2015
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