Instructions on Creating PROM File and Writing to Flash Memory
The board uses a S25FL128SAGMFIR0 flash memory with one-bit SPI interface to store the FPGA configuration.
Creating PROM File
- Build firmware configuration file ( *.bit )
- Start Impact
- Click on Create Prom file. Follow the flow to add SPI Flash , Configure Single FPGA
- At "Step 2. Add Storage Device(s)" add a 128Mbit device
- At "Step 3." give the output file a suitable name. Leave the other boxes as default. Click OK
- You will be prompted to "Start adding device file to Revision 0". Select the *.bit file. When asked "Would you like to add another device file to Revision: 0?" click "No"
- You will be told you have finished entering files. Click on "Generate File ..."
- Go back to "Boundary Scan" menu.
- Right click on icon representing FPGA. Select "Add SPI/BPI flash". Select the *.mcs file you have just generated.
- When asked to "Select the PROM attached to FPGA" choose S25FL128S . Leave data-width as 1x. An icon marked "FLASH" should appear, connected to the FPGA.
# Right click on FLASH icon. Select "program". Wait several ( up to
about 10 ) minutes...
( In the Impact console window should see something like ....
'1': Reading status register contents... INFO:iMPACT:2219 - Status register values: INFO:iMPACT - 0011 1100 1110 1100 INFO:iMPACT:2492 - '1': Completed downloading core to device. '1': IDCODE is '012018' (in hex). '1': ID Check passed. '1': IDCODE is '012018' (in hex). '1': ID Check passed. '1': Erasing Device. '1': Using Sector Erase. '1': Erasing non-volatile quad-enable bit... '1': Programming Flash. '1': Reading device contents... done. '1': Verification completed. '1':Programming in x1 mode. S25FL128S Status Register Contents = 0x0000. QUAD : 0 BP2 : 0 BP1 : 0 BP0 : 0 '1': Programmed successfully. INFO:iMPACT - '1': Flash was programmed successfully. LCK_cycle = NoWait. LCK cycle: NoWait INFO:iMPACT - '1': Checking done pin....done. '1': Programmed successfully. PROGRESS_END - End Operation. Elapsed time = 210 sec. .
Once this is done, when the power is cycled the FPGA should load the
firmware programmed into the SPI flash.
(might want to check this by interrogating the firmware ID register ).