Commit 6c8da241 authored by Cesar Prados's avatar Cesar Prados

msi_interrupts: add function for controlling the IRQ buffers

parent 3e64397d
......@@ -26,6 +26,8 @@ entity VME_Buffer_ctrl is
addr_buff_v2f_o : out std_logic;
addr_buff_f2v_o : out std_logic;
dtack_oe_o : out std_logic;
latch_buff_o : out std_logic
);
end entity;
......@@ -83,6 +85,8 @@ begin
with g_bus_mode select
latch_buff_o <= '1' when LATCHED,
'0' when CLOCKED;
dtack_oe_o <= buffer_stat_i.s_dtack_oe;
-- dir_eo_buff_ctrl : process(clk_i, rst_i)
-- begin
......
......@@ -38,6 +38,9 @@ package VME_Buffer_pack is
is_d64 : std_logic;
vme_write : std_logic)
return t_VME_BUFFER;
function buffer_irq_function ( fsm : t_IRQMainFSM)
return t_VME_BUFFER;
type bus_mode is ( LATCHED,
CLOCKED);
......@@ -57,6 +60,8 @@ package VME_Buffer_pack is
addr_buff_v2f_o : out std_logic;
addr_buff_f2v_o : out std_logic;
dtack_oe_o : out std_logic;
latch_buff_o : out std_logic
);
end component VME_Buffer_ctrl;
......@@ -178,7 +183,29 @@ package body VME_Buffer_pack is
vme_buff.s_clk := '0';
vme_buff.s_dtack_oe := '1';
when DATA_OUT =>
when others =>
vme_buff.s_addrDir := VME2FPGA;
vme_buff.s_dataDir := VME2FPGA;
vme_buff.s_buffer_eo := ADDR_BUFF;
vme_buff.s_clk := '0';
vme_buff.s_dtack_oe := '0';
end case;
return vme_buff;
end buffer_function;
function buffer_irq_function ( fsm : t_IRQMainFSM )
return t_VME_BUFFER is
variable vme_buff : t_VME_BUFFER := c_buffer_default;
begin
case fsm is
when DATA_OUT =>
vme_buff.s_addrDir := VME2FPGA;
vme_buff.s_dataDir := FPGA2VME;
......@@ -195,16 +222,18 @@ package body VME_Buffer_pack is
vme_buff.s_dtack_oe := '1';
when others =>
vme_buff.s_addrDir := VME2FPGA;
vme_buff.s_dataDir := VME2FPGA;
vme_buff.s_buffer_eo := ADDR_BUFF;
vme_buff.s_clk := '0';
vme_buff.s_dtack_oe := '0';
end case;
return vme_buff;
end buffer_function;
end buffer_irq_function;
end VME_Buffer_pack;
......@@ -143,8 +143,8 @@ architecture Behavioral of VME_IRQ_Controller is
--
signal s_AS_FallingEdge : std_logic;
signal s_AS_RisingEdge : std_logic;
type t_MainFSM is (IDLE, IRQ, WAIT_AS, WAIT_DS, LATCH_DS, CHECK, DATA_OUT, DTACK,IACKOUT1,IACKOUT2);
signal s_currs, s_nexts : t_MainFSM;
--type t_IRQMainFSM is (IDLE, IRQ, WAIT_AS, WAIT_DS, LATCH_DS, CHECK, DATA_OUT, DTACK,IACKOUT1,IACKOUT2);
signal s_currs, s_nexts : t_IRQMainFSM;
signal s_ack_int : std_logic;
signal s_VME_ADDR_123_latched : std_logic_vector(2 downto 0);
signal s_VME_DS_latched : std_logic_vector(1 downto 0);
......@@ -354,14 +354,14 @@ begin
s_FSM_IRQ <= c_FSM_IRQ;
--s_FSM_IRQ.s_DataDir <= '1';
--s_FSM_IRQ.s_DTACK_OE <= '1';
s_FSM_IRQ.s_buffer <= buffer_function(s_currs, '0', '0');
s_FSM_IRQ.s_buffer <= buffer_irq_function(s_currs);
s_FSM_IRQ.s_resetIRQ <= '0';
when DTACK=>
s_FSM_IRQ <= c_FSM_IRQ;
--s_FSM_IRQ.s_DataDir <= '1';
--s_FSM_IRQ.s_DTACK_OE <= '1';
s_FSM_IRQ.s_buffer <= buffer_function(s_currs, '0', '0');
s_FSM_IRQ.s_buffer <= buffer_irq_function(s_currs);
s_FSM_IRQ.s_DTACK <= '0';
when others => null;
......
......@@ -422,6 +422,9 @@ package xvme64x_pack is
-- TWOe_END_2
);
type t_IRQMainFSM is (IDLE, IRQ, WAIT_AS, WAIT_DS, LATCH_DS,
CHECK, DATA_OUT, DTACK,IACKOUT1,IACKOUT2);
type t_initState is ( IDLE,
SET_ADDR,
GET_DATA,
......
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