Appending wrong string to Makefile for Quartus
Windows 10, Quartus 18.0, hdlmake 3.3
When I tried to find out in my previous bug report (#107 (closed)) I found one more issue:
Exactly algorithm for issue repeating:
cd .\tests\counter\syn\cyclone3_sk_quartus\verilog\
Then comment out strings 11-12 with quartus_preflow
and quartus_postmodule
.
Then:
hdlmake
make
After ran hdlmake
take a look to string 34 in Makefile. There is "empty" echo command:
@echo >> $@
But results of this command (after make
command) in the files.tcl
looks next:
ECHO is off.
set_global_assignment -name VERILOG_FILE ../../../modules/counter/verilog/counter.v -library work
set_global_assignment -name VERILOG_FILE ../../../top/cyclone3_sk/verilog/cyclone3_top.v -library work
The first string in files.tcl is "ECHO is off.". And it is mistake for Quartus too.
Maybe it is not a bug but a feature...