Commit d34e800c authored by Tristan Gingold's avatar Tristan Gingold

gn412x_bfm: work arounds for issues in questa sim.

Also fix some typos.
parent c5520d7a
......@@ -2756,7 +2756,11 @@ CMD_RD_DATA <= CMD_RD_DATA_OUT when CMD_RD_DATA_OUT_VALID = '1' else CMD_RD_DATA
variable vTYPE : std_ulogic_vector(3 downto 0);
variable START : time;
begin
wait until(L2P_CLKi_90'event and (L2P_CLKi_90 = '1') and (L2P_VALIDi = '1') and MODE_PRIMARY);
if not MODE_PRIMARY then
wait;
end if;
wait until rising_edge(L2P_CLKi_90);
if L2P_VALIDi = '1' then
START := NOW;
if(L2P_DFRAMEi = '1') then
vHEADER(15 downto 0) := L2P_DATAi;
......@@ -2780,8 +2784,8 @@ CMD_RD_DATA <= CMD_RD_DATA_OUT when CMD_RD_DATA_OUT_VALID = '1' else CMD_RD_DATA
vADDRESS(31 downto 16) := L2P_DATAi;
end if;
-- write(OUTPUT_LINE, ("-->> L2P Packet: " & to_string(START)));
-- writeline(OUT_FILE, OUTPUT_LINE);
-- write(OUTPUT_LINE, ("-->> L2P Packet: " & to_string(START)));
-- writeline(OUT_FILE, OUTPUT_LINE);
write(OUTPUT_LINE, string'("-->>>> L2P Header: "));
case vTYPE is
......@@ -2796,7 +2800,7 @@ CMD_RD_DATA <= CMD_RD_DATA_OUT when CMD_RD_DATA_OUT_VALID = '1' else CMD_RD_DATA
write_hex_vector(OUTPUT_LINE, vHEADER(11 downto 10));
write(OUTPUT_LINE, string'(", LENGTH=0x"));
write_hex_vector(OUTPUT_LINE, vHEADER(9 downto 0));
-- writeline(OUT_FILE, OUTPUT_LINE);
-- writeline(OUT_FILE, OUTPUT_LINE);
write(OUTPUT_LINE, string'("-->>>> Address: 0x"));
write_hex_vector(OUTPUT_LINE, vADDRESS);
write(OUTPUT_LINE, string'(" @ "));
......@@ -2812,7 +2816,7 @@ CMD_RD_DATA <= CMD_RD_DATA_OUT when CMD_RD_DATA_OUT_VALID = '1' else CMD_RD_DATA
write(OUTPUT_LINE, string'(", V=" & to_str(vHEADER(12))));
write(OUTPUT_LINE, string'(", LENGTH=0x"));
write_hex_vector(OUTPUT_LINE, vHEADER(9 downto 0));
-- writeline(OUT_FILE, OUTPUT_LINE);
-- writeline(OUT_FILE, OUTPUT_LINE);
write(OUTPUT_LINE, string'("-->>>> Address: 0x"));
write_hex_vector(OUTPUT_LINE, vADDRESS);
write(OUTPUT_LINE, string'(" @ "));
......@@ -2863,10 +2867,11 @@ CMD_RD_DATA <= CMD_RD_DATA_OUT when CMD_RD_DATA_OUT_VALID = '1' else CMD_RD_DATA
end if;
else
write(OUTPUT_LINE, string'("-- ERROR: L2P Bus: P2L_VALID asserted without P2L_DFRAME @"));
write(OUTPUT_LINE, string'("-- ERROR: L2P Bus: L2P_VALID asserted without P2L_DFRAME @"));
write(OUTPUT_LINE, START);
writeline(OUT_FILE, OUTPUT_LINE);
end if;
end if;
end process;
--#########################################################################--
......@@ -2882,7 +2887,11 @@ CMD_RD_DATA <= CMD_RD_DATA_OUT when CMD_RD_DATA_OUT_VALID = '1' else CMD_RD_DATA
variable vTYPE : std_ulogic_vector(3 downto 0);
variable START : time;
begin
wait until(P2L_CLKpi'event and (P2L_CLKpi = '1') and (P2L_VALIDi = '1') and MODE_PRIMARY);
if not MODE_PRIMARY then
wait;
end if;
wait until rising_edge(P2L_CLKpi);
if P2L_VALIDi = '1' then
START := NOW;
if(P2L_DFRAMEi = '1') then
vHEADER(15 downto 0) := P2L_DATAi;
......@@ -2988,9 +2997,6 @@ CMD_RD_DATA <= CMD_RD_DATA_OUT when CMD_RD_DATA_OUT_VALID = '1' else CMD_RD_DATA
write(OUTPUT_LINE, START);
writeline(OUT_FILE, OUTPUT_LINE);
end if;
end if;
end process;
end MODEL;
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