Working interface between GN4124 and spartan 6.
Uses serdes and PLL for clocking. IODELAY are bypassed on data inputs lines. System clock in shifted 90deg compared to input p2l clock.
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- hdl/gn4124core/rtl/gn4124_core_s6.vhd 15 additions, 5 deletionshdl/gn4124core/rtl/gn4124_core_s6.vhd
- hdl/gn4124core/rtl/p2l_des_s6.vhd 4 additions, 26 deletionshdl/gn4124core/rtl/p2l_des_s6.vhd
- hdl/gn4124core/rtl/serdes_1_to_n_clk_pll_s2_diff.vhd 1 addition, 1 deletionhdl/gn4124core/rtl/serdes_1_to_n_clk_pll_s2_diff.vhd
- hdl/gn4124core/rtl/serdes_1_to_n_data_s2_se.vhd 1 addition, 1 deletionhdl/gn4124core/rtl/serdes_1_to_n_data_s2_se.vhd
- hdl/pfc/ip_cores/ram_2048x32.xise 2 additions, 322 deletionshdl/pfc/ip_cores/ram_2048x32.xise
- hdl/pfc/ise_project/pfc_wrapper.bit 0 additions, 0 deletionshdl/pfc/ise_project/pfc_wrapper.bit
- hdl/pfc/ise_project/pfc_wrapper.par 77 additions, 97 deletionshdl/pfc/ise_project/pfc_wrapper.par
- hdl/pfc/ise_project/pfc_wrapper.syr 167 additions, 129 deletionshdl/pfc/ise_project/pfc_wrapper.syr
- hdl/pfc/ise_project/pfc_wrapper.twr 228 additions, 1720 deletionshdl/pfc/ise_project/pfc_wrapper.twr
- hdl/pfc/ise_project/pfc_wrapper.xise 2 additions, 5 deletionshdl/pfc/ise_project/pfc_wrapper.xise
- hdl/pfc/rtl/pfc_wrapper.vhd 31 additions, 6 deletionshdl/pfc/rtl/pfc_wrapper.vhd
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