Genrams not working on Xlinx 6 series
The current master commit (bd7bca1c) have introduced some changes on the
organization
of "memory" related modules.
Specifically, it has moved the "generic_shiftreg_fifo.vhd",
"inferred_sync_fifo.vhd" and "inferred_async_fifo.vhd" modules to
an
specific folder (generic) and change the "Manifest.py" to include it
when selecting the target "xilinx" or "altera".
However, on selecting the target as "xilinx" and with
"syn_device[0:4].upper()=="XC6V"", the generic folder is not
included.
This makes Xilinx Specific-FIFOs "generic_async_fifo.vhd",
"generic_sync_fifo.vhd" not compiling as it uses the inferred FIFOs
depending on its generics.
As I suggestion, I would include these modules
(generic_shiftreg_fifo.vhd, inferred_sync_fifo.vhd and
inferred_async_fifo.vhd)
available to every target (Virtex6, for instance) so I can instantiate
these module
directly. Sometimes it's good to instantiate a specific type of FIFO. Do
you think
this makes sense?
As a possible fix we could just move these modules back to the
"modules/genrams"
directory and updated the Manifests accordingly. But I'm not sure if
this is the
correct approach.