... | ... | @@ -123,12 +123,20 @@ One assembled board will arrive in a week.</td> |
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<td>17-12-2010</td>
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<td>Test code loaded in the System FPGA and PROM programmed. JTAG and PROM loading are working. VME access OK.</td>
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</tr>
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<tr class="odd">
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<td>11-04-2011</td>
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<td>Ten additional boards produced. Two reworked and work, but have JTAG issues. Eight still need rework.</td>
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</tr>
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<tr class="even">
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<td>11-04-2011</td>
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<td>Modifications to layout required. Can start in two to three weeks time.</td>
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</tr>
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</tbody>
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</table>
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-----
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Andrea Boccardi, Erik van der Bij - 20 December 2010
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Andrea Boccardi, Erik van der Bij - 11 April 2011
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... | ... | |