try to move things to synchr dma_work

parent e21d811e
......@@ -273,6 +273,19 @@ static unsigned int ft_buffer_count(struct fmctdc_dev *ft, unsigned int chan)
return ft_ioread(ft, base + TDC_BUF_REG_CUR_COUNT);
}
/**
* It aborts a running acquisition
* @cset ZIO channel set
*/
static void ft_abort_acquisition(struct zio_cset *cset)
{
struct fmctdc_dev *ft = cset->zdev->priv_d;
gn4124_dma_abort(ft);
zio_cset_busy_clear(cset, 1);
zio_trigger_abort_disable(cset, 0);
}
/**
* It transfers timestamps from the DDR
......@@ -349,8 +362,34 @@ static void ft_dma_work(struct work_struct *work)
dma_sync_single_for_device(ft->fmc->hwdev, ft->zdma->dma_page_desc_pool,
sizeof(struct gncore_dma_item) * ft->zdma->sgt.nents,
DMA_TO_DEVICE);
ft_irq_enable_restore(ft);
gn4124_dma_start(ft);
ft_eic_irq_enable(ft, TDC_EIC_EIC_IMR_TDC_DMA_MASK);
gn4124_dma_wait_done(ft); /* what is this? *? */
loop = (unsigned long *) &ft->dma_chan_mask;
if (WARN(!ft->zdma, "DMA not programmed correctly ")) {
for_each_set_bit(i, loop, FT_NUM_CHANNELS)
ft_abort_acquisition(&ft->zdev->cset[i]);
}
zio_dma_unmap_sg(ft->zdma);
zio_dma_free_sg(ft->zdma);
for_each_set_bit(i, loop, FT_NUM_CHANNELS)
zio_cset_busy_clear(&ft->zdev->cset[i], 1);
if (irq_stat & DMA_EIC_EIC_IDR_DMA_ERROR) {
dev_err(ft->fmc->hwdev, "0x%X 0x%X",
irq_stat, dma_readl(ft, GENNUM_DMA_STA));
for_each_set_bit(i, loop, FT_NUM_CHANNELS)
ft_abort_acquisition(&ft->zdev->cset[i]);
}
/* perhpas WQ: it processes data */
for_each_set_bit(i, loop, FT_NUM_CHANNELS)
zio_trigger_data_done(&ft->zdev->cset[i]);
>>>>>>> try to move things to synchr dma_work
return;
err_map:
......@@ -451,26 +490,11 @@ irq:
return;
}
/**
* It aborts a running acquisition
* @cset ZIO channel set
*/
static void ft_abort_acquisition(struct zio_cset *cset)
{
struct fmctdc_dev *ft = cset->zdev->priv_d;
gn4124_dma_abort(ft);
zio_cset_busy_clear(cset, 1);
zio_trigger_abort_disable(cset, 0);
}
static irqreturn_t ft_irq_handler_dma_complete(int irq, void *dev_id)
{
struct fmc_device *fmc = dev_id;
struct fmctdc_dev *ft = fmc->mezzanine_data;
uint32_t irq_stat;
unsigned long *loop;
int i;
irq_stat = ft_ioread(ft, ft->ft_dma_eic_base + DMA_EIC_REG_EIC_ISR);
if (!irq_stat)
......@@ -479,7 +503,8 @@ static irqreturn_t ft_irq_handler_dma_complete(int irq, void *dev_id)
return IRQ_NONE;
}
ft_iowrite(ft, irq_stat, ft->ft_dma_eic_base + TDC_EIC_REG_EIC_ISR);
/*
loop = (unsigned long *) &ft->dma_chan_mask;
if (WARN(!ft->zdma, "DMA not programmed correctly ")) {
......@@ -503,17 +528,18 @@ static irqreturn_t ft_irq_handler_dma_complete(int irq, void *dev_id)
goto out;
}
/* perhpas WQ: it processes data */
// perhpas WQ: it processes data
for_each_set_bit(i, loop, FT_NUM_CHANNELS)
zio_trigger_data_done(&ft->zdev->cset[i]);
*/
out:
/* out: */
fmc_irq_ack(fmc);
spin_unlock(&ft->dma_lock);
/* Re-Enable interrupts that were disabled in the IRQ handler */
ft_eic_irq_enable(ft, TDC_EIC_EIC_IMR_TDC_DMA_MASK);
/* ft_irq_enable_restore(ft); */
return IRQ_HANDLED;
}
......
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