... | ... | @@ -34,8 +34,8 @@ Overview of specifications of CERN developments at |
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- [FmcAdc100M14b4cha: 100 MSPS, 14 bits, 4
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channel](https://www.ohwr.org/project/fmc-adc-100m14b4cha) (CERN
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BE/CO) - being designed
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- User: BPM Linac4. To be used on VME carrier (Soby. 1st beam end
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2010)
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- User: BPM Linac4. To be used on VME carrier (L.Soby, M.Sordet
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1st beam end 2010)
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- User: OASIS general purpose (Deghaye)
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- [FmcAdc1/FMC2: 100 MSPS, 2 channel, 14 bit max. with auto
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calibration](https://www.ohwr.org/project/fmc-adc1) - (CERN BE/CO) -
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... | ... | @@ -55,15 +55,19 @@ Overview of specifications of CERN developments at |
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FMC will only contain some kind of digital receiver logic.
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(9/2/10)
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- Users: TE/EPC 64 channels; SVC project (11x64 signals).
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- 2.5 MSPS, 24-bit ADC, +/- 10V input, auto-calibration, trigger by
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machine timing (CERN TE/MSC, Giloteaux)
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<!-- end list -->
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- 2.5 MSPS, 24-bit ADC, 1 channel, +/- 10V input, auto-calibration,
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trigger by machine timing (CERN TE/MSC, Giloteaux)
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- User: Train-B systems of AD, LEIR, PS, Booster and SPS. End 2010
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prototype.
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#### Digital to Analog Converters
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- [FMC3: 10MSPS, 4 channel, 16 bit, output range
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+/-10V.](https://www.ohwr.org/project/fmc-dac1)
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+/-10V.](https://www.ohwr.org/project/fmc-dac1) - Project will not
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start before 2011
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#### High-performance Time-to-Digital Converter
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