... | ... | @@ -56,6 +56,7 @@ Projects](https://www.ohwr.org/project/fmc-projects) |
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## PCB versions
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### Working versions
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* EDA-03287-V5 studies launched end 2021, to solve below problems and in addition cope with electronics components shortage
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* [EDA-03287-V4](https://edms.cern.ch/item/EDA-03287-V4-0/)
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* Modifications required for proper operation:
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* To get rid of the N12V0 100mV ripple, place the not-mounted C1 capacitor of 150pF. This will render the LM2611 (IC2) feedback loop stable.
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... | ... | @@ -89,8 +90,10 @@ Projects](https://www.ohwr.org/project/fmc-projects) |
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* LMH7324 Vee from -5V to -2.5V
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* all hysteresis components removed
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* 200 ohm lvds resistors changed to 470 ohm
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* P2V5 EN pin linked to shdn_poss because otherwise regulator is powered too quickly and powering FPGA bank before Vcco
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* MAX160 sequencer:
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* P2V5 EN pin linked to shdn_poss because otherwise regulator is powered too quickly and powering FPGA bank before Vcco
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* added PG_C2M dependency for clean start-up - shdn_poss really needed then?
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* why is the P4V5 rail sequenced? Cause on V1 schematics this rail powered the DAC reference (P5V0), changed on V2 to P12V0 though. Properly fixed on V5, see higher
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* negative supplies: inductances changed to IHLP2525CZER100M01
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* several others.. to be documented/copied from DFS spreadsheet
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