added by Tomasz Wlostowski on 2013-07-09 19:31:57.793539
An engineer-to-engineer note
describing the hardware and VHDL design of the Fine Delay has been
published. It provides a lot of information on the internals of the FD
card, calibration techniques, White Rabbit implementation, Acam's TDC
and programming the card's registers.
09-01-2013: 70 Fine Delay FMC cards shipped
added by Erik van der Bij on 2013-01-08 16:38:52.285515
INCAA Computers in the Netherlands has produced and tested seventy Fine
Delay FMC cards. These cards have a resolution better than 1 ns.
15 V3 boards built
added by Erik van der Bij on 2012-03-30 13:23:05.367061
A small series of the Fine Delay module board has been built to be used
in tests for CNGS to help in measuring precisely the speed of neutrinos.
One board will be reserved to be used in a prototype setup for the LHC
kicker magnets. It was V3 that has been built, V4 will have a slightly
different output stage.
02-03-2012: review of V4 held
added by Erik van der Bij on 2012-03-02 10:24:25.822607
A schematics and PCB review had been held for the V4 of the fine delay
FMC module. During the
we made suggestions that improve the reliability of the board and will
make it more safe to use when no terminations are used on the output
signals. Once the modifications are made, CERN will order 40 boards.
02-09-2011: V2 works
added by Tomasz Wlostowski on 2011-09-02 16:42:42.443459
The just-arrived V2 prototype was confirmed to work with the new VHDL
firmware on a SPEC card. See Measurements for details.
31-08-2011: Received V2 boards
added by Erik van der Bij on 2011-08-31 14:51:46.520917
We received assembled prototypes of V2 of the fine delay module. The
firmware for the Fine delay module on a SPEC card is being developed and
should be ready for demonstration in around two weeks time.
18-03-2011: Production files V1 ready
added by Erik van der Bij on 2011-03-21 18:03:52.632105
CERN's design office reviewed the PCB layout and generated the
production files that are in the same format as over 2000 other CERN
03-02-2011: PCB assembled and powered up
added by Tomasz Wlostowski on 2011-02-03 21:14:37.454451
One prototype PCB has been assembled in our lab and immediately powered
up. All power supplies are correct and the board's I2C peripherals
18-01-2011: PCB layout received for review.
added by Erik van der Bij on 2011-01-19 13:42:31.870341
The PCB layout has been received for review. It will be reviewed within
a day and then quickly three prototypes will be built. In parallel the
design will be reviewed by CERN's design office and complete production
files will be generated so that the design will be easier to be built by
15-06-2010: Functional system specification review held.
added by Erik van der Bij on 2010-06-15 17:19:44.466297
A review of the functional system
has been held. It resulted in some minor clarifications and in the
simplification that input pulses will be ignored until the previous
input pulse delay has expired.
22-04-2010: Functional system specification process started
added by Javier Serrano on 2010-05-03 14:15:38.825480