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FMC DEL 1ns 4cha
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FMC DEL 1ns 4cha
Commits
a4189bc2
Commit
a4189bc2
authored
May 18, 2012
by
Tomasz Wlostowski
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software/include: added debug registers & raw mode readout
parent
41ceeae5
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3 changed files
with
19 additions
and
1 deletion
+19
-1
fd_main_regs.h
software/include/fd_main_regs.h
+8
-1
fdelay_lib.h
software/include/fdelay_lib.h
+10
-0
fdelay_private.h
software/include/fdelay_private.h
+1
-0
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software/include/fd_main_regs.h
View file @
a4189bc2
...
...
@@ -3,7 +3,7 @@
* File : fd_main_regs.h
* Author : auto-generated by wbgen2 from fd_main_wishbone_slave.wb
* Created :
Wed Apr 11 11:05:22
2012
* Created :
Fri May 18 16:07:09
2012
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fd_main_wishbone_slave.wb
...
...
@@ -274,6 +274,9 @@
#define FD_TSBCR_COUNT_W(value) WBGEN2_GEN_WRITE(value, 10, 12)
#define FD_TSBCR_COUNT_R(reg) WBGEN2_GEN_READ(reg, 10, 12)
/* definitions for field: RAW readout mode enable in reg: Timestamp Buffer Control Register */
#define FD_TSBCR_RAW WBGEN2_GEN_MASK(22, 1)
/* definitions for register: Timestamp Buffer Interrupt Register */
/* definitions for field: IRQ timeout [milliseconds] in reg: Timestamp Buffer Interrupt Register */
...
...
@@ -344,6 +347,8 @@
#define FD_TDER2_PELT_DRIVE_W(value) WBGEN2_GEN_WRITE(value, 0, 32)
#define FD_TDER2_PELT_DRIVE_R(reg) WBGEN2_GEN_READ(reg, 0, 32)
/* definitions for register: Timestamp Buffer Debug Values Register */
/* definitions for register: Interrupt disable register */
/* definitions for field: TS Buffer not empty. in reg: Interrupt disable register */
...
...
@@ -445,6 +450,8 @@
#define FD_REG_TDER1 0x0000006c
/* [0x70]: REG Test/Debug register 1 */
#define FD_REG_TDER2 0x00000070
/* [0x74]: REG Timestamp Buffer Debug Values Register */
#define FD_REG_TSBR_DEBUG 0x00000074
/* [0x80]: REG Interrupt disable register */
#define FD_REG_EIC_IDR 0x00000080
/* [0x84]: REG Interrupt enable register */
...
...
software/include/fdelay_lib.h
View file @
a4189bc2
...
...
@@ -36,8 +36,18 @@ typedef struct fdelay_device
void
*
priv_io
;
/* pointer to the I/O routines private data */
}
fdelay_device_t
;
typedef
struct
{
int64_t
utc
,
utc_sh
;
int32_t
coarse
,
coarse_sh
;
int32_t
start_offset
;
int32_t
subcycle_offset
;
int32_t
frac
;
}
fdelay_raw_time_t
;
typedef
struct
{
fdelay_raw_time_t
raw
;
int64_t
utc
;
/* TAI seconds */
/* FIXME: replace all UTCs with TAIs or seconds for clarity */
int32_t
coarse
;
/* 125 MHz counter cycles */
int32_t
frac
;
/* Fractional part (<8ns) */
...
...
software/include/fdelay_private.h
View file @
a4189bc2
...
...
@@ -85,6 +85,7 @@ struct fine_delay_hw
int32_t
board_temp
;
/* Current temperature of the board, unit = 1/16 degC */
int
wr_enabled
;
int
wr_state
;
int
raw_mode
;
struct
fine_delay_calibration
calib
;
int64_t
input_user_offset
,
output_user_offset
;
};
...
...
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