|
|
# Preliminary specs
|
|
|
|
|
|
- 1 ns resolution.
|
|
|
- 10 us - 500 us range
|
|
|
- 1 input
|
|
|
- 8 individually controllable outputs
|
|
|
- 10 us - 500 us range.
|
|
|
- 1 input.
|
|
|
- 8 individually controllable outputs.
|
|
|
- Input and outputs are LVDS, all in a single LVDS connector. Level
|
|
|
translation will be performed in a separate active patch panel.
|
|
|
- Delay circuit reacts on input rising edge. Minimum input pulse
|
... | ... | |