FMC I2C bus addressing
According to Table 10 (p. 67) of the ANSI/VITA 57.1 standard, the IPMI memory address is 0b10100xx (instead of 0b10101xx) and its two lowermost bits are (somewhat counter-intuitively) configured by the GA bits in the opposite direction: GA1 -> A0, GA0 -> A1. The latter also applies to the other devices connected to the FMC I2C bus (the temp. sensor and the ADC).