FmcAdc100M14b4cha SVEC gateware release 4.1 Changelog: - Bug #1299: hdl: dpram0 erroneously instantiates dual clock memory - Feature #937: hdl - Remaining shot register in single-shot mode - Feature #1266: Increase on-chip memory for multi-shot acquisitions - Feature #1290: Replace "decimation" with "under-sampling" - Feature #1297: Clean up and update build process - Feature #1298: Clean up and update simulations and testbenches