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FMC ADC 100M 14b 4cha
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hdl
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svec_top_fmc_adc_100Ms.ucf
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hdl - review reset logic, closes #1239
· afaa7258
Dimitris Lampridis
authored
May 19, 2016
Also point to new, stable release of DDR3 core (1.0) which also fixes the reset logic
afaa7258