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FMC ADC 100M 14b 4cha - Testing
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FMC ADC 100M 14b 4cha - Testing
Commits
2dfa2945
Commit
2dfa2945
authored
Jul 16, 2013
by
Matthieu Cattin
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svec_test00: Add bitstream load test for svec.
parent
9173c900
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svec_test00.py
test/fmcadc100m14b4cha/python/svec_test00.py
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2dfa2945
#! /usr/bin/env python
# coding: utf8
# Copyright CERN, 2013
# Author: Matthieu Cattin <matthieu.cattin@cern.ch>
# Licence: GPL v2 or later.
# Website: http://www.ohwr.org
# Import system modules
import
sys
import
time
import
os
# Add common modules and libraries location to path
sys
.
path
.
append
(
'../../../'
)
sys
.
path
.
append
(
'../../../common/'
)
# Import common modules
from
ptsexcept
import
*
# Import specific modules
from
fmc_adc_svec
import
*
"""
test00: Load firmware, verify firmware type and test mezzanine presence line.
"""
def
main
(
default_directory
=
'.'
):
# Constants declaration
LUN
=
0
TEST_NB
=
0
FMC_ADC_BITSTREAM
=
'../firmwares/svec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM
=
os
.
path
.
join
(
default_directory
,
FMC_ADC_BITSTREAM
)
EXPECTED_BITSTREAM_TYPE
=
0x0
start_test_time
=
time
.
time
()
print
"
\n
================================================================================"
print
"==> Test
%02
d start
\n
"
%
TEST_NB
# SVEC object declaration
print
"Loading hardware access library and opening device.
\n
"
bus
=
VME_rr_compatible
(
LUN
)
print
"Initialising device.
\n
"
bus
.
vv_init
()
# Load FMC ADC firmware
print
"Loading FMC ADC firmware:
%
s
\n
"
%
FMC_ADC_BITSTREAM
bus
.
vv_load
(
FMC_ADC_BITSTREAM
,
1
)
time
.
sleep
(
2
)
# Carrier object declaration (SPEC board specific part)
try
:
carrier
=
CFmcAdc100mSpec
(
bus
,
EXPECTED_BITSTREAM_TYPE
)
except
FmcAdc100mSpecOperationError
as
e
:
raise
PtsCritical
(
"Carrier init failed, test stopped:
%
s"
%
e
)
# Print bitsteam type
carrier_type
=
carrier
.
get_carrier_type
()
print
(
'Carrier type:0x
%.8
X'
)
%
carrier_type
if
carrier_type
==
2
:
print
"Carrier type OK.
\n
"
# Print carrier CSR registers
carrier
.
print_csr
()
print
"==> End of test
%02
d"
%
TEST_NB
print
"================================================================================"
end_test_time
=
time
.
time
()
print
"Test
%02
d elapsed time:
%.2
f seconds
\n
"
%
(
TEST_NB
,
end_test_time
-
start_test_time
)
bus
.
vv_close
()
if
__name__
==
'__main__'
:
main
()
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