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FMC ADC 100M 14b 4cha - Software
Commit 59929742 authored by Federico Vaga's avatar Federico Vaga
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kernel: allow users to change the internal clock 

zio implementation
the timing base exported in zio control. In this way, within the
control, you can read the last value that the user programmed.
(e.g. By comparing this value with the user clock reference you
can calculate how bad is the ADC internal clock)
Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 9dd2bd69
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Showing with 27 additions and 3 deletions
kernel/fa-zio-drv.c
View file @ 59929742
......@@ -74,6 +74,11 @@ static struct zio_attribute zfad_cset_ext_zattr[] = {
ZIO_ATTR_EXT("tstamp-acq-str-b", ZIO_RO_PERM,
ZFA_UTC_ACQ_START_FINE, 0),
/* Timing base */
ZIO_ATTR_EXT("tstamp-base-s", ZIO_RW_PERM, ZFA_UTC_SECONDS, 0),
ZIO_ATTR_EXT("tstamp-base-t", ZIO_RW_PERM, ZFA_UTC_COARSE, 0),
/* Parameters (not attributes) follow */
/*
......@@ -161,12 +166,16 @@ static int zfad_conf_set(struct device *dev, struct zio_attribute *zattr,
uint32_t usr_val)
{
struct fa_dev *fa = get_zfadc(dev);
unsigned int baseoff = fa->fa_adc_csr_base;
struct zio_channel *chan;
int i, range, err, reg_index;
reg_index = zattr->id;
i = FA_NCHAN;
if (zattr->id >= ZFA_UTC_SECONDS && zattr->id <= ZFA_UTC_ACQ_END_FINE)
baseoff = fa->fa_utc_base;
switch (reg_index) {
/*
* Most of the following "case" statements are simply
......@@ -242,11 +251,19 @@ static int zfad_conf_set(struct device *dev, struct zio_attribute *zattr,
case ZFA_CHx_STA:
reg_index = zfad_get_chx_index(reg_index, to_zio_chan(dev));
break;
case ZFA_UTC_COARSE:
if (usr_val >= FA_UTC_CLOCK_FREQ) {
dev_err(dev,
"ticks time must be in the range [0, %d]\n",
FA_UTC_CLOCK_FREQ);
return -EINVAL;
}
break;
case ZFA_CTL_FMS_CMD:
return zfad_fsm_command(fa, usr_val);
}
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[reg_index], usr_val);
fa_writel(fa, baseoff, &zfad_regs[reg_index], usr_val);
return 0;
}
......@@ -259,10 +276,14 @@ static int zfad_info_get(struct device *dev, struct zio_attribute *zattr,
uint32_t *usr_val)
{
struct fa_dev *fa = get_zfadc(dev);
unsigned int baseoff = fa->fa_adc_csr_base;
int i, reg_index;
i = FA_NCHAN;
if (zattr->id >= ZFA_UTC_SECONDS && zattr->id <= ZFA_UTC_ACQ_END_FINE)
baseoff = fa->fa_utc_base;
switch (zattr->id) {
/* FIXME temporary until TLV control */
case ZFA_CH1_OFFSET:
......@@ -309,7 +330,7 @@ static int zfad_info_get(struct device *dev, struct zio_attribute *zattr,
reg_index = zattr->id;
}
*usr_val = fa_readl(fa, fa->fa_adc_csr_base, &zfad_regs[reg_index]);
*usr_val = fa_readl(fa, baseoff, &zfad_regs[reg_index]);
return 0;
}
static const struct zio_sysfs_operations zfad_s_op = {
......
kernel/fmc-adc-100m14b4cha.h
View file @ 59929742
......@@ -59,8 +59,12 @@ enum fa_dev_ext_attributes {
ZFAD_ATTR_ACQ_START_S,
ZFAD_ATTR_ACQ_START_C,
ZFAD_ATTR_ACQ_START_F,
ZFAD_ATTR_BASE_S,
ZFAD_ATTR_BASE_C,
};
#define FA_UTC_CLOCK_FREQ 125000000
#define FA_UTC_CLOCK_NS 8
#define FA_NCHAN 4 /* We have 4 of them,no way out of it */
/* ADC DDR memory */
......@@ -243,7 +247,6 @@ enum fa_sw_param_id {
ZFA_SW_PARAM_COMMON_LAST,
};
/*
* Bit pattern used in order to factorize code between SVEC and SPEC
* Depending of the carrier, ADC may have to listen vaious IRQ sources
......
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