Commit 2d1e26b6 authored by Federico Vaga's avatar Federico Vaga

sysfs: add saturation attribute

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 1f7e2a82
......@@ -129,6 +129,20 @@ void zfad_reset_offset(struct fa_dev *fa)
zfad_apply_user_offset(fa, &fa->zdev->cset->chan[i], 0);
}
/*
* zfad_init_saturation
* @fa: the fmc-adc descriptor
*
* Initialize all saturation registers to the maximum value
*/
void zfad_init_saturation(struct fa_dev *fa)
{
int idx, i;
for (i = 0, idx = ZFA_CH1_SAT; i < FA_NCHAN; ++i, idx += ZFA_CHx_MULT)
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[idx], 0x7fff);
}
/*
* zfad_set_range
* @fa: the fmc-adc descriptor
......@@ -359,6 +373,9 @@ static int __fa_init(struct fa_dev *fa)
zfad_reset_offset(fa);
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFA_CTL_DAC_CLR_N], 1);
/* Initialize channel saturation values */
zfad_init_saturation(fa);
/* Set UTC seconds from the kernel seconds */
fa_writel(fa, fa->fa_utc_base, &zfad_regs[ZFA_UTC_SECONDS],
get_seconds());
......
......@@ -56,6 +56,11 @@ static struct zio_attribute zfad_cset_ext_zattr[] = {
ZIO_ATTR_EXT("ch2-vref", ZIO_RW_PERM, ZFA_CH3_CTL_RANGE, 0),
ZIO_ATTR_EXT("ch3-vref", ZIO_RW_PERM, ZFA_CH4_CTL_RANGE, 0),
ZIO_ATTR_EXT("ch0-saturation", ZIO_RW_PERM, ZFA_CH1_SAT, 0),
ZIO_ATTR_EXT("ch1-saturation", ZIO_RW_PERM, ZFA_CH2_SAT, 0),
ZIO_ATTR_EXT("ch2-saturation", ZIO_RW_PERM, ZFA_CH3_SAT, 0),
ZIO_ATTR_EXT("ch3-saturation", ZIO_RW_PERM, ZFA_CH4_SAT, 0),
ZIO_ATTR_EXT("ch0-50ohm-term", ZIO_RW_PERM, ZFA_CH1_CTL_TERM, 0),
ZIO_ATTR_EXT("ch1-50ohm-term", ZIO_RW_PERM, ZFA_CH2_CTL_TERM, 0),
ZIO_ATTR_EXT("ch2-50ohm-term", ZIO_RW_PERM, ZFA_CH3_CTL_TERM, 0),
......@@ -129,6 +134,9 @@ static ZIO_ATTR_DEFINE_STD(ZIO_DEV, zfad_chan_std_zattr) = {
#endif
static struct zio_attribute zfad_chan_ext_zattr[] = {
#if 0 /* FIXME Unused until TLV control will be available */
ZIO_ATTR("saturation", ZIO_RW_PERM, ZFA_CHx_SAT, 0),
#endif
/*ZIO_ATTR(zdev, "50ohm-termination", ZIO_RW_PERM, ZFA_CHx_CTL_TERM, 0x11),*/
ZIO_PARAM_EXT("current-value", ZIO_RO_PERM, ZFA_CHx_STA, 0),
};
......@@ -284,6 +292,7 @@ static int zfad_info_get(struct device *dev, struct zio_attribute *zattr,
*usr_val = fa_read_temp(fa, 0);
*usr_val = (*usr_val * 1000 + 8) / 16;
return 0;
case ZFA_CHx_SAT:
case ZFA_CHx_CTL_TERM:
case ZFA_CHx_CTL_RANGE:
reg_index = zfad_get_chx_index(zattr->id, to_zio_chan(dev));
......
......@@ -197,6 +197,7 @@ enum zfadc_dregs_enum {
ZFA_CHx_STA,
ZFA_CHx_GAIN,
ZFA_CHx_OFFSET,
ZFA_CHx_SAT,
/* end:declaration block requiring some order */
/* two wishbone core for IRQ: VIC, ADC */
ZFA_IRQ_ADC_DISABLE_MASK,
......@@ -307,7 +308,7 @@ enum fa_sw_param_id {
* ZFA_CHx_MULT : the trick which requires channel regs id grouped and ordered
* address offset between two registers of the same type on consecutive channel
*/
#define ZFA_CHx_MULT 5
#define ZFA_CHx_MULT 6
/* ADC DDR memory */
#define FA_MAX_ACQ_BYTE 0x10000000 /* 256MB */
......
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