Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
F
FMC ADC 100M 14b 4cha - Gateware
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
8
Issues
8
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
FMC ADC 100M 14b 4cha - Gateware
Commits
63abdbf0
Commit
63abdbf0
authored
May 02, 2019
by
Dimitris Lampridis
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
hdl: only store info about the trigger if there is an ongoing acquisition
parent
77bd4c90
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
2 additions
and
2 deletions
+2
-2
fmc_adc_100Ms_core.vhd
hdl/rtl/fmc_adc_100Ms_core.vhd
+2
-2
No files found.
hdl/rtl/fmc_adc_100Ms_core.vhd
View file @
63abdbf0
...
...
@@ -1000,7 +1000,7 @@ begin
"00"
&
sw_trig_fixed_delay
(
sw_trig_fixed_delay
'HIGH
)
&
ext_trig_fixed_delay
(
ext_trig_fixed_delay
'HIGH
);
trig_fifo_wr
<=
not
trig_fifo_full
and
acq_in_wait_trig
;
trig_fifo_wr
<=
not
trig_fifo_full
;
cmp_trig_sync_fifo
:
generic_async_fifo
generic
map
(
...
...
@@ -1047,7 +1047,7 @@ begin
if
rising_edge
(
sys_clk_i
)
then
if
sys_rst_n_i
=
'0'
or
trig_storage_clear
=
'1'
then
trig_storage
<=
(
others
=>
'0'
);
elsif
trig_fifo_dout
(
32
)
=
'1'
and
trig_fifo_empty
=
'0'
then
elsif
trig_fifo_dout
(
32
)
=
'1'
and
trig_fifo_empty
=
'0'
and
acq_in_wait_trig
=
'1'
then
trig_storage
<=
trig_fifo_dout
(
31
downto
0
);
end
if
;
end
if
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment