Skip to content

F
FMC ADC 100M 14b 4cha - Gateware
Commit 258a3330 authored by mcattin's avatar mcattin
Browse files
Options

Reorganise files in dir. 

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@66 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
parent 8c514a73
Hide whitespace changes
Inline Side-by-side
Showing with 4 additions and 7 deletions
hdl/spec/rtl/Manifest.py
View file @ 258a3330
files = [ files = [
"spec_top_fmc_adc_100Ms.vhd", "spec_top_fmc_adc_100Ms.vhd",
"fmc_adc_100Ms_csr.vhd", "fmc_adc_100Ms_csr.vhd"];
"../spec_top_fmc_adc_100Ms.ucf"];
modules = { modules = {
"local" : "../../adc/rtl", "local" : "../../adc/rtl",
"svn" : [ "http://svn.ohwr.org/ddr3-sp6-core/trunk/hdl/rtl", "svn" : [ "http://svn.ohwr.org/ddr3-sp6-core/trunk/hdl/rtl",
"http://svn.ohwr.org/gn4124-core/trunk/hdl/gn4124core/rtl"], "http://svn.ohwr.org/gn4124-core/trunk/hdl/gn4124core/rtl",
"http://svn.ohwr.org/gn4124-core/trunk/hdl/common/rtl"],
"git" : "git://ohwr.org/hdl-core-lib/general-cores.git"} "git" : "git://ohwr.org/hdl-core-lib/general-cores.git"}
fetchto="../ip_cores" fetchto="../ip_cores"
hdl/spec/wb_gen/Makefile
View file @ 258a3330
WBGEN2=../../../../wbgen2/wishbone-gen/wbgen2 WBGEN2=~/wbgen2/wishbone-gen/wbgen2
RTL=../rtl/ RTL=../rtl/
carrier_csr: carrier_csr:
$(WBGEN2) -l vhdl -V $(RTL)$@.vhd -D $@.htm -C $@.h $@.wb $(WBGEN2) -l vhdl -V $(RTL)$@.vhd -D $@.htm -C $@.h $@.wb
fmc_adc_100Ms_csr:
$(WBGEN2) -l vhdl -V $(RTL)$@.vhd -D $@.htm -C $@.h $@.wb
\ No newline at end of file
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment