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|* SDB version, offset (bytes) *|**Description**|**Peripherals**|**Internal mapping**|**Status**|
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|0x00000|SDB header|[SDB specification](https://www.ohwr.org/project/fpga-config-space/uploads/fb0072056414d497e4ca370ec5c95b84/sdb-1.1.pdf)|-|Available|
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|0x00000|SDB header|[SDB specification](https://ohwr.org/project/fpga-config-space/uploads/fb0072056414d497e4ca370ec5c95b84/sdb-1.1.pdf)|-|Available|
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|0x01000|DMA Controller|DMA config. and status|[Registers](http://svn.ohwr.org/gn4124-core/trunk/documentation/specifications/func_spec_GN4124_core.pdf)|Available|
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|0x01100|Carrier 1-wire master|Thermometer + unique ID [DS18B20](http://datasheets.maxim-ic.com/en/ds/DS18B20.pdf)|[Registers](http://opencores.org/websvn,filedetails?repname=sockit_owm&path=%2Fsockit_owm%2Ftrunk%2Fdoc%2Fsockit_owr.pdf)|Available|
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|0x01200|Carrier CSR|PLL, DDR status, LED control, etc...|[Registers](https://www.ohwr.org/project/fmc-adc-100m14b4cha-gw/commits/spec-fmc-adc-v2.0/hdl/spec/wb_gen/carrier_csr.htm)|Available|
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|0x01300|Interrupt controller|Enable mask, irq source|[Registers](https://www.ohwr.org/project/fmc-adc-100m14b4cha-gw/commits/spec-fmc-adc-v2.0/hdl/spec/wb_gen/irq_controller_regs.htm)|Available|
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|0x02000|Time-tag core|Trigger, acq time-tags|[Registers](https://www.ohwr.org/project/fmc-adc-100m14b4cha-gw/commits/spec-fmc-adc-v2.0/hdl/ip_cores/timetag_core/wb_gen/timetag_core_regs.htm)|Available|
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|0x04000|Bridge SDB header|[SDB specification](https://www.ohwr.org/project/fpga-config-space/uploads/fb0072056414d497e4ca370ec5c95b84/sdb-1.1.pdf)|-|Available|
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|0x04000|Bridge SDB header|[SDB specification](https://ohwr.org/project/fpga-config-space/uploads/fb0072056414d497e4ca370ec5c95b84/sdb-1.1.pdf)|-|Available|
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|0x05000|Mezzanine system management I2C master|0x50) EEPROM (FMC standard) [24AA64T](http://ww1.microchip.com/downloads/en/DeviceDoc/21189S.pdf)|[Registers](http://opencores.org/websvn,filedetails?repname=i2c&path=%2Fi2c%2Ftrunk%2Fdoc%2Fi2c_specs.pdf)|Available|
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|0x05100|Mezzanine SPI master|0) ADC [LTC2174](http://cds.linear.com/docs/Datasheet/21754314fa.pdf), 1->4) DAC (for DC offset) [MAX5442](http://datasheets.maxim-ic.com/en/ds/MAX5441-MAX5444.pdf)|[Registers](http://opencores.org/websvn,filedetails?repname=spi&path=%2Fspi%2Ftrunk%2Fdoc%2Fspi.pdf)|Available|
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|0x05200|Mezzanine I2C master|0x55) Oscillator (sampling clock) [Si570](http://www.silabs.com/Support%20Documents/TechnicalDocs/si570.pdf)|[Registers](http://opencores.org/websvn,filedetails?repname=i2c&path=%2Fi2c%2Ftrunk%2Fdoc%2Fi2c_specs.pdf)|Available|
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