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FMC DEL 1ns 4cha - Software
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FMC DEL 1ns 4cha - Software
Commits
a8d583ce
Commit
a8d583ce
authored
Apr 25, 2012
by
Alessandro Rubini
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added moduleparameters, made order in printks
parent
da567812
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3 changed files
with
27 additions
and
17 deletions
+27
-17
calibrate.c
calibrate.c
+12
-10
fd-core.c
fd-core.c
+10
-3
fine-delay.h
fine-delay.h
+5
-4
No files found.
calibrate.c
View file @
a8d583ce
...
...
@@ -109,10 +109,10 @@ static uint64_t output_delay_ps(struct spec_fd *fd, int ch, int fine, int n,
* Then, fr is around 0xc00, bin is 0x50.0000: use 3LL for 64b
*/
res
=
fr
*
3LL
*
fd
->
bin
;
if
(
0
)
pr
intk
(
"%s: ch %i, fine %i, bin %x got %08x, "
"res 0x%016llx
\n
"
,
__func__
,
ch
,
fine
,
fd
->
bin
,
fr
,
res
);
if
(
fd
->
verbose
>
3
)
pr
_info
(
"%s: ch %i, fine %i, bin %x got %08x, "
"res 0x%016llx
\n
"
,
__func__
,
ch
,
fine
,
fd
->
bin
,
fr
,
res
);
results
[
i
]
=
res
;
acc
+=
res
;
}
...
...
@@ -128,8 +128,10 @@ static uint64_t output_delay_ps(struct spec_fd *fd, int ch, int fine, int n,
if
(
results
[
i
]
>
stats
->
max
)
stats
->
max
=
results
[
i
];
if
(
results
[
i
]
<
stats
->
min
)
stats
->
min
=
results
[
i
];
}
printk
(
"res %llx avg %llx min %llx max %llx
\n
"
,
acc
,
stats
->
avg
,
stats
->
min
,
stats
->
max
);
if
(
fd
->
verbose
>
2
)
pr_info
(
"%s: ch %i, taps %i, count %i, result %llx "
"(max-min %llx)
\n
"
,
__func__
,
ch
,
fine
,
n
,
stats
->
avg
,
stats
->
max
-
stats
->
min
);
}
kfree
(
results
);
...
...
@@ -157,12 +159,12 @@ static int fd_find_8ns_tap(struct spec_fd *fd, int ch)
while
(
r
-
l
>
1
)
{
mid
=
(
l
+
r
)
/
2
;
dly
=
output_delay_ps
(
fd
,
ch
,
mid
,
FD_CAL_STEPS
,
&
stats
)
-
bias
;
if
(
1
)
{
if
(
fd
->
verbose
>
1
)
{
printk
(
"%s: ch%i @ %-5i: "
,
__func__
,
ch
,
mid
);
__pr_fixed
(
"bias "
,
bias
,
", "
);
__pr_fixed
(
"min "
,
stats
.
min
,
", "
);
__pr_fixed
(
"avg "
,
stats
.
avg
,
", "
);
__pr_fixed
(
"max "
,
stats
.
max
,
"
\n
"
);
__pr_fixed
(
"min "
,
stats
.
min
-
bias
,
", "
);
__pr_fixed
(
"avg "
,
stats
.
avg
-
bias
,
", "
);
__pr_fixed
(
"max "
,
stats
.
max
-
bias
,
"
\n
"
);
}
if
(
dly
<
8000
<<
16
)
...
...
fd-core.c
View file @
a8d583ce
...
...
@@ -24,6 +24,13 @@
#include "fine-delay.h"
#include "hw/fd_main_regs.h"
/* Module parameters */
static
int
fd_regs_offset
=
FD_REGS_OFFSET
;
module_param_named
(
regs
,
fd_regs_offset
,
int
,
0444
);
static
int
fd_verbose
=
0
;
module_param_named
(
verbose
,
fd_verbose
,
int
,
0444
);
/* This is pre-set at load time (data by Tomasz) */
static
struct
fd_calib
fd_default_calib
=
{
.
frr_poly
=
{
...
...
@@ -137,9 +144,9 @@ int fd_probe(struct spec_dev *dev)
dev
->
sub_priv
=
fd
;
fd
->
spec
=
dev
;
fd
->
base
=
dev
->
remap
[
0
];
fd
->
regs
=
fd
->
base
+
FD_REGS_OFFSET
;
fd
->
regs
=
fd
->
base
+
fd_regs_offset
;
fd
->
ow_regs
=
fd
->
regs
+
0x500
;
fd
->
verbose
=
fd_verbose
;
fd
->
calib
=
fd_default_calib
;
/* Check the binary is there */
...
...
@@ -167,7 +174,7 @@ int fd_probe(struct spec_dev *dev)
/* Finally, enable the input */
fd_writel
(
fd
,
FD_GCR_INPUT_EN
,
FD_REG_GCR
);
if
(
1
)
{
if
(
0
)
{
struct
timespec
ts1
,
ts2
,
ts3
;
/* Temporarily, test the time stuff */
fd_time_set
(
fd
,
NULL
,
NULL
);
...
...
fine-delay.h
View file @
a8d583ce
...
...
@@ -20,8 +20,8 @@ struct fd_calib {
#define FD_CH_INT(i) ((i) - 1)
#define FD_CH_EXT(i) ((i) + 1)
#define FD_NUM_TAPS 1024
#define FD_CAL_STEPS 1
6 //1024
#define FD_NUM_TAPS 1024
/* This is an hardware feature of SY89295U */
#define FD_CAL_STEPS 1
024
/* This is a parameter: must be power of 2 */
struct
fd_ch
{
/* Offset between FRR measured at known T at startup and poly-fitted */
...
...
@@ -43,7 +43,8 @@ struct spec_fd {
int
acam_addr
;
/* cache of currently active addr */
uint8_t
ds18_id
[
8
];
unsigned
long
next_t
;
int
temp
;
/* scaled by 4 bits */
int
temp
;
/* temperature: scaled by 4 bits */
int
verbose
;
};
/* Internal time: the first three fields are just converted to zio time */
...
...
@@ -85,7 +86,7 @@ static inline void fd_ch_writel(struct spec_fd *fd, int ch,
fd_writel
(
fd
,
v
,
0x100
+
ch
*
0x100
+
reg
);
}
#define FD_REGS_OFFSET 0x84000
#define FD_REGS_OFFSET 0x84000
/* can be changed by "regs=" */
#define FD_MAGIC_FPGA 0xf19ede1a
/* FD_REG_IDR content */
/* Values for the configuration of the acam PLL. Can be changed */
...
...
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