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FMC DEL 1ns 4cha - Software
Commit 23c17f9b authored by Alessandro Rubini's avatar Alessandro Rubini
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introduce fd_readl/writel to save some typing

parent 69565ecd
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Showing with 31 additions and 25 deletions
acam.c
View file @ 23c17f9b
......@@ -95,21 +95,21 @@ static void acam_set_address(struct spec_fd *fd, int addr)
static uint32_t acam_readl(struct spec_fd *fd, int reg)
{
acam_set_address(fd, reg);
writel(FD_TDCSR_READ, fd->regs + FD_REG_TDCSR);
return readl(fd->regs + FD_REG_TDR) & ACAM_MASK;
fd_writel(fd, FD_TDCSR_READ, FD_REG_TDCSR);
return fd_readl(fd, FD_REG_TDR) & ACAM_MASK;
}
static void acam_writel(struct spec_fd *fd, int val, int reg)
{
acam_set_address(fd, reg);
writel(val, fd->regs + FD_REG_TDR);
writel(FD_TDCSR_WRITE, fd->regs + FD_REG_TDCSR);
fd_writel(fd, val, FD_REG_TDR);
fd_writel(fd, FD_TDCSR_WRITE, FD_REG_TDCSR);
}
static void acam_set_bypass(struct spec_fd *fd, int on)
{
/* FIXME: this zeroes all other GCR bits */
writel(on ? FD_GCR_BYPASS : 0, fd->regs + FD_REG_GCR);
fd_writel(fd, on ? FD_GCR_BYPASS : 0, FD_REG_GCR);
}
static inline int acam_is_pll_locked(struct spec_fd *fd)
......@@ -263,8 +263,7 @@ static int __acam_config(struct spec_fd *fd, struct acam_mode_setup *s)
__func__, s->name, bin, hsdiv, refdiv);
/* Disable TDC inputs prior to configuring */
writel(FD_TDCSR_STOP_DIS | FD_TDCSR_START_DIS,
fd->regs + FD_REG_TDCSR);
fd_writel(fd, FD_TDCSR_STOP_DIS | FD_TDCSR_START_DIS, FD_REG_TDCSR);
for (p = s->data, i = 0; i < s->data_size; p++, i++) {
regval = p->val;
......
fd-core.c
View file @ 23c17f9b
......@@ -43,23 +43,21 @@ static struct fd_calib fd_default_calib = {
static void fd_do_reset(struct spec_fd *fd, int hw_reset)
{
if (hw_reset) {
writel(FD_RSTR_LOCK_W(0xdead) | FD_RSTR_RST_CORE_MASK,
fd->regs + FD_REG_RSTR);
fd_writel(fd, FD_RSTR_LOCK_W(0xdead) | FD_RSTR_RST_CORE_MASK,
FD_REG_RSTR);
udelay(10000);
writel(FD_RSTR_LOCK_W(0xdead) | FD_RSTR_RST_CORE_MASK
| FD_RSTR_RST_FMC_MASK,
fd->regs + FD_REG_RSTR);
fd_writel(fd, FD_RSTR_LOCK_W(0xdead) | FD_RSTR_RST_CORE_MASK
| FD_RSTR_RST_FMC_MASK, FD_REG_RSTR);
/* TPS3307 supervisor needs time to de-assert master reset */
msleep(600);
return;
}
writel(FD_RSTR_LOCK_W(0xdead) | FD_RSTR_RST_FMC_MASK,
fd->regs + FD_REG_RSTR);
fd_writel(fd, FD_RSTR_LOCK_W(0xdead) | FD_RSTR_RST_FMC_MASK,
FD_REG_RSTR);
udelay(1000);
writel(FD_RSTR_LOCK_W(0xdead) | FD_RSTR_RST_FMC_MASK
| FD_RSTR_RST_CORE_MASK,
fd->regs + FD_REG_RSTR);
fd_writel(fd, FD_RSTR_LOCK_W(0xdead) | FD_RSTR_RST_FMC_MASK
| FD_RSTR_RST_CORE_MASK, FD_REG_RSTR);
udelay(1000);
}
......@@ -86,7 +84,7 @@ int fd_reset_again(struct spec_fd *fd)
j = jiffies + 2 * HZ;
while (time_before(jiffies, j)) {
if (readl(fd->regs + FD_REG_GCR) & FD_GCR_DDR_LOCKED)
if (fd_readl(fd, FD_REG_GCR) & FD_GCR_DDR_LOCKED)
break;
msleep(10);
}
......@@ -143,7 +141,7 @@ int fd_probe(struct spec_dev *dev)
fd->calib = fd_default_calib;
/* Check the binary is there */
if (readl(fd->regs + FD_REG_IDR) != FD_MAGIC_FPGA) {
if (fd_readl(fd, FD_REG_IDR) != FD_MAGIC_FPGA) {
pr_err("%s: card at %04x:%04x has wrong gateware\n",
__func__, dev->pdev->bus->number, dev->pdev->devfn);
return -ENODEV;
......@@ -165,7 +163,7 @@ int fd_probe(struct spec_dev *dev)
}
/* Finally, enable the input */
writel(FD_GCR_INPUT_EN, fd->regs + FD_REG_GCR);
fd_writel(fd, FD_GCR_INPUT_EN, FD_REG_GCR);
return 0;
......
fine-delay.h
View file @ 23c17f9b
......@@ -24,6 +24,15 @@ struct spec_fd {
int temp; /* scaled by 4 bits */
};
static inline uint32_t fd_readl(struct spec_fd *fd, unsigned long reg)
{
return readl(fd->regs + reg);
}
static inline void fd_writel(struct spec_fd *fd, uint32_t v, unsigned long reg)
{
writel(v, fd->regs + reg);
}
#define FD_REGS_OFFSET 0x84000
#define FD_MAGIC_FPGA 0xf19ede1a /* FD_REG_IDR content */
......
spi.c
View file @ 23c17f9b
......@@ -29,14 +29,14 @@ int fd_spi_xfer(struct spec_fd *fd, int ss, int num_bits,
else if(ss == FD_CS_GPIO)
scr |= FD_SCR_SEL_GPIO;
writel(scr, fd->regs + FD_REG_SCR);
writel(scr | FD_SCR_START, fd->regs + FD_REG_SCR);
while (!(readl(fd->regs + FD_REG_SCR) & FD_SCR_READY))
fd_writel(fd, scr, FD_REG_SCR);
fd_writel(fd, scr | FD_SCR_START, FD_REG_SCR);
while (!(fd_readl(fd, FD_REG_SCR) & FD_SCR_READY))
if (jiffies > j)
break;
if (!(readl(fd->regs + FD_REG_SCR) & FD_SCR_READY))
if (!(fd_readl(fd, FD_REG_SCR) & FD_SCR_READY))
return -EIO;
scr = readl(fd->regs + FD_REG_SCR);
scr = fd_readl(fd, FD_REG_SCR);
r = FD_SCR_DATA_R(scr);
if(out) *out=r;
udelay(100); /* FIXME: check */
......
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