Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
F
FPGA and ARM SoC FMC Carrier FASEC
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
FPGA and ARM SoC FMC Carrier FASEC
Repository
38b0c2b15c59f58648dc579a453b4d1ac9716a5d
Switch branch/tag
fasec
FASEC_prototype.hw
History
Find file
Select Archive Format
Source code
Download zip
Download tar.gz
Download tar.bz2
Download tar
OpenCores I2C master with AXI4-bridge, from cores, added and tested; draft software driver as well
· d1e57cd0
Pieter Van Trappen
authored
Aug 26, 2016
d1e57cd0
Name
Last commit
Last update
..
FASEC_prototype.lpr
Loading commit data...