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/4549
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## Design documents after review (March 2016)
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Updated/new:
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- [Schematics v0.5 and Altium
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project](https://www.ohwr.org/project/fasec/wikis/Documents/Design-schematics)
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- [Spreadsheet with changes after design reviews
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listed](https://www.ohwr.org/project/fasec/wikis/Documents/Design-review-changes)
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- Test project to verify I/O port mapping with synthesis (Vivado
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2015.4): <https://gitlab.cern.ch/te-abt-ec/FASEC_test>
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Unchanged:
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- [Block diagram](https://www.ohwr.org/project/fasec/wikis/Documents/Design-block-diagram)
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- [Power rail calculations](https://www.ohwr.org/project/fasec/wikis/Documents/Design-power-calculations)
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## <s>Design documents for review (February 2016)</s>
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- \-[Block diagram](https://www.ohwr.org/project/fasec/wikis/Documents/Design-block-diagram-)
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- \-[Schematics v0.4 and Altium
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project](https://www.ohwr.org/project/fasec/wikis/Documents/Design-draft-schematics-)
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- \-[Power rail calculations](https://www.ohwr.org/project/fasec/wikis/Documents/Design-power-calculations-)
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## Main Features
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- XC7Z030 controller, SoC with Kintex-7 logic (called PL, i.e.
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compatible)
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- 2x LEMO/SMC inputs (5V)
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- 2x LEMO/SMC outputs capable of driving 3.3V @ 50 ohm
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- 1x mini displayPort connector for high-speed serial card-to-card
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GTP link
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- 1x USB3.0 A connector for high-speed serial card-to-card GTP
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link (no USB functionality\!)
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- 8x Programmable LED (4 by PL, 4 by PS)
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- POR Reset push button
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- Back panel
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... | ... | @@ -120,6 +97,29 @@ Unchanged: |
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- Gateware:
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- Embedded Linux distribution:
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### Design documents after review (March 2016)
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Updated/new:
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- [Schematics v0.5 and Altium
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|
project](https://www.ohwr.org/project/fasec/wikis/Documents/Design-schematics)
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- [Spreadsheet with changes after design reviews
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listed](https://www.ohwr.org/project/fasec/wikis/Documents/Design-review-changes)
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- Test project to verify I/O port mapping with synthesis (Vivado
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2015.4): <https://gitlab.cern.ch/te-abt-ec/FASEC_test>
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Unchanged:
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- [Block diagram](https://www.ohwr.org/project/fasec/wikis/Documents/Design-block-diagram)
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- [Power rail calculations](https://www.ohwr.org/project/fasec/wikis/Documents/Design-power-calculations)
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### <s>Design documents for review (February 2016)</s>
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- \-[Block diagram](https://www.ohwr.org/project/fasec/wikis/Documents/Design-block-diagram-)
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- \-[Schematics v0.4 and Altium
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project](https://www.ohwr.org/project/fasec/wikis/Documents/Design-draft-schematics-)
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- \-[Power rail calculations](https://www.ohwr.org/project/fasec/wikis/Documents/Design-power-calculations-)
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-----
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## Contacts
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... | ... | |