Syntax fix

ed70a4fe · Dave Newbold · c53bdf53 · ed70a4fe
Commit ed70a4fe authored Apr 10, 2018 by Dave Newbold
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sc_zs_sel_rolling.vhd components/solid/firmware/hdl/sc_zs_sel_rolling.vhd +2 -1

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--- a/components/solid/firmware/hdl/sc_zs_sel_rolling.vhd
+++ b/components/solid/firmware/hdl/sc_zs_sel_rolling.vhd
@@ -11,6 +11,7 @@
 library IEEE;
 use IEEE.STD_LOGIC_1164.ALL;
 use ieee.numeric_std.all;
+use ieee.std_logic_misc.all;

 use work.top_decl.all;

@@ -72,7 +73,7 @@ begin
 				t := k;
 			end if;
 		end loop;
-		ts <= t;
+		ts <= std_logic_vector(t);
 	end process;
 	
 -- Pipelining; send new ZS threshold choice at correct time